경계 스캔 기반 온-라인 회로 성능 모니터링 기법

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박정석;강태근;이현빈
Park, Jeongseok;Kang, Taegeun;Yi, Hyunbean

  • 투고 : 2015.11.19
  • 심사 : 2015.12.28
  • 발행 : 2016.01.25

초록

반도체 제조공정의 발달로 칩의 성능은 더욱 향상되었으나 회로가 미세해지고 복잡해져 동작 환경에 의한 회로의 노화가 가속화 될 수 있다. 회로의 노화는 성능 저하로 나타나며, 결과적으로 시스템 오류를 발생 시킬 수 있다. 고신뢰 시스템에서는, 노화로 인한 오류가 큰 재난으로 이어질 수 있으므로, 사고를 예방하기 위한 오류 발생 예측 기술이 필수적이다. 본 논문에서는 회로의 정상동작 중에 성능 저하를 감지하여 오류를 예측 할 수 있는 모니터링 기법을 제시한다. 모니터링을 위한 별도의 회로를 추가하지 않고 경계 스캔 셀과 TAP 제어기를 재활용한 IEEE 1149.1 경계 스캔 기반의 온-라인 성능 저하 모니터링 방법을 제시한다. 시뮬레이션을 통하여 제안하는 성능 저하 모니터링 기법을 검증한다.

키워드

IEEE 1149.1;boundary-scan;design-for-reliability;on-line monitoring;circuit aging

참고문헌

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과제정보

연구 과제 주관 기관 : 한국연구재단