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Run-Time Hardware Trojans Detection Using On-Chip Bus for System-on-Chip Design

온칩버스를 이용한 런타임 하드웨어 트로이 목마 검출 SoC 설계

  • Received : 2015.12.31
  • Accepted : 2016.02.03
  • Published : 2016.02.29

Abstract

A secure and effective on-chip bus for detecting and preventing malicious attacks by infected IPs is presented in this paper. Most system inter-connects (on-chip bus) are vulnerable to hardware Trojan (Malware) attack because all data and control signals are routed. A proposed secure bus with modifications in arbitration, address decoding, and wrapping for bus master and slaves is designed using the Advanced High-Performance and Advance Peripheral Bus (AHB and APB Bus). It is implemented with the concept that arbiter checks share of masters and manage infected masters and slaves in every transaction. The proposed hardware is designed with the Xilinx 14.7 ISE and verified using the HBE-SoC-IPD test board equipped with Virtex4 XC4VLX80 FPGA device. The design has a total gate count of 39K at an operating frequency of 313MHz using the $0.13{\mu}m$ TSMC process.

Keywords

AHB Bus;Hardware Trojan Horse;IP;Malware;SoC

References

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Acknowledgement

Supported by : IITP (Institute for Information and Communication Technology Promotion)