# 동적 주파수 분할기의 변조신호 전송 조건을 위한 입출력 전달 특성 분석과 설계에 대한 연구

• Accepted : 2016.01.05
• Published : 2016.02.29
• 52 21

#### Abstract

In order to transmit baseband signals through frequency dividing devices, we studied the transfer function of the device in the term of the baseband signal distortion. From the analysis, it is shown that the magnitude of the envelope signal is related to the mixer gain and the insertion loss of the low pass filter whilst the phase is the additional function with the 1/2 of the phase delay. For the purpose of the verification of the study, we designed a dynamic frequency divider at 1,400 MHz. The operating frequency range of the device is closely related to the conversion gain of mixers and the amplitude of input signal, and becomes wide as the conversion gain of mixers increases. The designed frequency divider operates between 0.9 GHz and 3.2 GHz, for -14.5 dBm input power. The circuit shows 20 mW power dissipation at $V_{DD}=2.5V$, and the simulation result shows that an amplitude modulated signal at 1,400 MHz with the modulation index of 0.9 was successfully downconverted to 700 MHz.

#### Keywords

CMOS;Miller Frequency Divider;Dynamic Frequency Divider

#### References

1. Youngcheol Park, "Class-F technique as applied to active frequency multiplier designs", IEEE Transactions on Microwave Theory and Techniques, vol. 57, no. 12, pp. 3212-3218, Dec. 2009. https://doi.org/10.1109/TMTT.2009.2033296
2. R. L. Miller, "Fractional-frequency generators utilizing regenerative modulation", Proc. Inst. Radio Eng., vol. 27, pp. 446-457, Jul. 1939.
3. J. Mullrich, W. Klein, R. Khlifi, and H. M. Rein, "SiGe regenerative frequency divider operating up to 63 GHz", Electronics Letters, 30th, vol. 35, no. 20, pp. 1730-1731, Sep. 1999.
4. Harsh Joshi, Sanjeev M. Ranjan, and Vijay Nath, "Design of high speed flip-flop based frequency divider for GHz PLL system: theory and design techniques in 250 nm CMOS technology", IJECSE, vol. 1, no. 3, pp. 1220-1226, Aug. 2012.
5. J. Lee, B. Razavi, "A 40 GHz frequency divider in 0.18 um CMOS technology", IEEE J. Solid-State Circuits, vol. 39, no. 4, pp. 594-601, Apr. 2004. https://doi.org/10.1109/JSSC.2004.825119
6. Sebastien Chartier, Liu Liu, Gerhard Fischer, Srdjan Glisic, Holger Hohnemann, Andreas Trasser, and Hermann Schumacher, "SiGe millimeter-wave dynamic frequency divider with enhanced sensitivity incorporating a trans-impedance stage", European Microwave IC Conference, pp. 84-87, Oct. 2007.
7. Z. Gu, A. Thiede, "18 GHz low-power CMOS static frequency divider", Electronics Letters, 2nd Ed., vol. 39, no. 20, pp. 1433-134, Oct. 2003. https://doi.org/10.1049/el:20030932
8. Y. Park, H. Yoon, "Time- and frequency-domain optimization of sparse multisine coefficients for nonlinear amplifier characterization", J. of Electromagnetic Eng. and Science, vol. 15, no. 1, pp. 53-58, Jan. 2015. https://doi.org/10.5515/JKIEES.2015.15.1.53
9. 류성헌, 박영철, "MOSFET을 사용한 700 MHz dynamic frequency divider 설계", 한국전자파학회 춘계마이크로파 및 전파전파 합동 학술대회, 38(6), 2015년 5월.
10. 류성헌, 박영철, "Miller 주파수 분할기를 활용한 AM 변조신호 전송에 대한 연구", 한국전자파학회 종합학술대회, 25(24), 2015년 11월.

#### Acknowledgement

Supported by : 한국연구재단