DOI QR코드

DOI QR Code

Non-equal DC link Voltages in a Cascaded H-Bridge with a Selective Harmonic Mitigation-PWM Technique Based on the Fundamental Switching Frequency

  • Moeini, Amirhossein (School of Electrical and Computer Engineering, College of Engineering, University of Tehran) ;
  • Iman-Eini, Hossein (School of Electrical and Computer Engineering, College of Engineering, University of Tehran) ;
  • Najjar, Mohammad (School of Electrical and Computer Engineering, College of Engineering, University of Tehran)
  • Received : 2016.08.16
  • Accepted : 2016.10.17
  • Published : 2017.01.20

Abstract

In this paper, the Selective Harmonic Mitigation-PWM (SHM-PWM) method is used in single-phase and three-phase Cascaded H-Bridge (CHB) inverters in order to fulfill different power quality standards such as EN 50160, CIGRE WG 36-05, IEC 61000-3-6 and IEC 61000-2-12. Non-equal DC link voltages are used to increase the degrees of freedom for the proposed SHM-PWM technique. In addition, it will be shown that the obtained solutions become continuous and without sudden changes. As a result, the look-up tables can be significantly reduced. The proposed three-phase modulation method can mitigate up to the 50th harmonic from the output voltage, while each switch has just one switching in a fundamental period. In other words, the switching frequency of the power switches are limited to 50 Hz, which is the lowest switching frequency that can be achieved in the multilevel converters, when the optimal selective harmonic mitigation method is employed. In single-phase mode, the proposed method can successfully mitigate harmonics up to the 50th, where the switching frequency is 150 Hz. Finally, the validity of the proposed method is verified by simulations and experiments on a 9-level CHB inverter.

References

  1. S. Khomfoi and L. M. Tolbert, "Multilevel power converters," Power Electronics Handbook, The University of Tennessee, Department of Electrical and Computer Engineering, 2007.
  2. J. Rodriguez, J.-S. Lai, and F. Z. Peng, "Multilevel inverters: a survey of topologies, controls, and applications," IEEE Trans. Ind. Electron., Vol. 49, No. 4, pp. 724-738, Aug. 2002. https://doi.org/10.1109/TIE.2002.801052
  3. B. P. McGrath and D. G. Holmes, "Multicarrier PWM strategies for multilevel inverters," IEEE Trans. Ind. Electron., Vol. 49, No. 4, pp. 858-867, Aug. 2002. https://doi.org/10.1109/TIE.2002.801073
  4. Voltage characteristics of electricity supplied by public distribution systems, B Standard, European Standard CENELEC EN 50160:1999, 1994.
  5. G. Beaulieu and G. Borloo, "Power quality indices and objectives," in 18th International Conference and Exhibition on Electricity Distribution (CIRED), Jun. 2005.
  6. Assessment of Emission limits for distorting loads in MV and HV power systems, Electromagnetic Compatibility, Technical Report Type 3, Tech. Rep. IEC61000-3-6:1996, 1996.
  7. Part 2-12: Compatibility levels for low-frequency conducted disturbances and signaling in public medium-voltage power supply systems, Electromagnetic Compatibility (EMC), document IEC 61000-2-12, Apr. 2003.
  8. V. G. Agelidis, A. I. Balouktsis, and C. Cossar, "On attaining the multiple solutions of selective harmonic elimination PWM three-level waveforms through function minimization," IEEE Trans. Ind. Electron., Vol. 55, No. 3, pp. 996-1004, Mar. 2008. https://doi.org/10.1109/TIE.2007.909728
  9. W. Fei, X. Du, and B. Wu, "A generalized half-wave symmetry SHE-PWM formulation for multilevel voltage inverters," IEEE Trans. Ind. Electron., Vol. 57, No. 9, pp. 3030-3038, Sep. 2010. https://doi.org/10.1109/TIE.2009.2037647
  10. L. G. Franquelo, J. Napoles, R. C. P. Guisado, J. I. Leon, and M. A. Aguirre, "A flexible selective harmonic mitigation technique to meet grid codes in three-level PWM converters," IEEE Trans. Ind. Electron., Vol. 54, No. 6, pp. 3022-3029, Dec. 2007. https://doi.org/10.1109/TIE.2007.907045
  11. J. Napoles, J. I. Leon, L. G. Franquelo, R. Portillo, and M. A. Aguirre, "Selective harmonic mitigation technique for multilevel cascaded H-bridge converters," in 35th Annual Conference of IEEE Industrial Electronics (IECON), pp. 806-811, Nov. 2009.
  12. A. Marzoughi, H. Imaneini, and A. Moeini, "An optimal selective harmonic mitigation technique for high power converters," International Journal of Electrical Power & Energy Systems, Vol. 49, pp. 34-39, Jul. 2013. https://doi.org/10.1016/j.ijepes.2012.12.007
  13. Y. Zhang, Y. W. Li, N. R. Zargari, and Z. Cheng, "Improved selective harmonics elimination scheme with online harmonic compensation for high-power PWM converters," IEEE Trans. Power Electron., Vol. 30, No. 7, pp. 3508-3517, Jul. 2015. https://doi.org/10.1109/TPEL.2014.2345051
  14. N. R. N. Ama, F. O. Martinz, L. Matakas, and F. Kassab, "Phase-locked loop based on selective harmonics elimination for utility applications," IEEE Trans. Power Electron., Vol. 28, No. 1, pp. 144-153, Jan. 2013. https://doi.org/10.1109/TPEL.2012.2195506
  15. G. Konstantinou, V. G. Agelidis, and J. Pou, "Theoretical considerations for single-phase interleaved converters operated with SHE-PWM," IEEE Trans. Power Electron., Vol. 29, No. 10, pp. 5124-5128, Oct. 2014. https://doi.org/10.1109/TPEL.2014.2319826
  16. M. K. Bakhshizadeh, H. Iman-Eini, and F. Blaabjerg, "Selective harmonic elimination in asymmetric cascaded multilevel inverters using a new low frequency strategy for photovoltaic applications," Electric Power Components and Systems, Vol. 43, No. 8-10, pp. 964-969, 2015. https://doi.org/10.1080/15325008.2015.1021058
  17. M. S. A. Dahidah, G. Konstantinou, and V. G. Agelidis, "A review of multilevel selective harmonic elimination PWM: formulations, solving algorithms, implementation and applications," IEEE Trans. Power Electron., Vol. 30, No. 8, pp. 4091-4106, Aug. 2015. https://doi.org/10.1109/TPEL.2014.2355226
  18. A. Kavousi, B. Vahidi, R. Salehi, M. K. Bakhshizadeh, N. Farokhnia, and S. S. Fathi, "Application of the bee algorithm for selective harmonic elimination strategy in multilevel inverters," IEEE Trans. Power Electron., Vol. 27, No. 4, pp. 1689-1696, Apr. 2012. https://doi.org/10.1109/TPEL.2011.2166124
  19. R. N. Ray, D. Chatterjee, and S. K. Goswami, "Harmonics elimination in a multilevel inverter using the particle swarm optimisation technique," IET Power Electronics, Vol. 2, No. 6, pp. 646-652, Nov. 2009. https://doi.org/10.1049/iet-pel.2008.0180
  20. W. Fei, X. Du, and B. Wu, "A generalized half-wave symmetry SHE-PWM formulation for multilevel voltage inverters," IEEE Trans. Ind. Electron., Vol. 57, No. 9, pp. 3030-3038, Sep. 2010. https://doi.org/10.1109/TIE.2009.2037647
  21. J. R. Espinoza, G. Joos, J. Guzman, and L. A. Moran, "Real-time implementation of a generalized approach for SHE and fundamental current control in current source topologies," in IEEE International Power Electronics Congress (CIEP), pp. 21-26, Oct. 2000.
  22. A. Moeini, A. Marzoughi, H. Iman-Eini, and S. Farhangi, "A modified control strategy for cascaded H-bridge rectifiers based on the low frequency SHE-PWM," in 12th International Conference on Environment and Electrical Engineering (EEEIC), pp. 501-506, May 2013.
  23. J. Napoles, R. Portillo, J. I. Leon, M. A. Aguirre, and L. G. Franquelo, "Implementation of a closed loop SHMPWM technique for three level converters," in 34th Annual Conference of IEEE. Industrial Electronics (IECON), pp. 3260-3265, Nov. 2008.
  24. J. Napoles, J. I. Leon, R. Portillo, L. G. Franquelo, and M. A. Aguirre, "Selective harmonic mitigation technique for high-power converters," IEEE Trans. Ind. Electron., Vol. 57, No. 7, pp. 2315-2323, Jul. 2010. https://doi.org/10.1109/TIE.2009.2026759
  25. A. Marzoughi and H. Imaneini, "An optimal selective harmonic mitigation for cascaded H-bridge converters," in 11th International Conference on Environment and Electrical Engineering (EEEIC), pp. 752-757, May 2012.
  26. J. Napoles, A. J. Watson, J. J. Padilla, J. I. Leon, L. G. Franquelo, P. W. Wheeler, and M. A. Aguirre, "Selective harmonic mitigation technique for cascaded H-bridge converters with nonequal DC link voltages," IEEE Trans. Ind. Electron., Vol. 60, No. 5, pp. 1963-1971, May 2013. https://doi.org/10.1109/TIE.2012.2192896
  27. N. Ghasemi, F. Zare, A. A. Boora, A. Ghosh, C. Langton, and F. Blaabjerg, "Harmonic elimination technique for a single-phase multilevel converter with unequal DC link voltage levels," IET Power Electronics, Vol. 5, No. 8, pp. 1418-1429, Sep. 2012. https://doi.org/10.1049/iet-pel.2011.0457
  28. N. Yousefpoor, S. H. Fathi, N. Farokhnia, and S. H. Sadeghi, "Application of OHSW technique in cascaded multi-Level inverter with adjustable DC sources," in International Conference on Electric Power and Energy Conversion Systems (EPECS), pp. 1-6, Nov. 2009.
  29. N. Farokhnia, S. H. Fathi, N. Yousefpoor, and M. K. Bakhshizadeh, "Minimisation of total harmonic distortion in a cascaded multilevel inverter by regulating voltages of dc sources," IET Power Electronics, Vol. 5, No. 1, pp. 106-114, Jan. 2012. https://doi.org/10.1049/iet-pel.2011.0092
  30. M. Najjar, A. Moeini, M. K. Bakhshizadeh, F. Blaabjerg, and S. Farhangi, "Optimal selective harmonic mitigation technique on variable DC link cascaded H-bridge converter to meet power quality standards," in IEEE Journal of Emerging and Selected Topics in Power Electronics, Vol. 4, No. 3, pp. 1107-1116, Sep. 2016. https://doi.org/10.1109/JESTPE.2016.2555995
  31. A. Moeini, H. Iman-Eini, and M. Bakhshizadeh, "Selective harmonic mitigation-pulse-width modulation technique with variable DC-link voltages in single and three-phase cascaded H-bridge inverters," IET Power Electronics, Vol. 7, No. 4, pp. 924-932, Apr. 2014. https://doi.org/10.1049/iet-pel.2013.0315
  32. M. Ashkaboosi, S. M. Nourani, P. Khazaei, M. Dabbaghjamanesh, and A. Moeini. "An optimization technique based on profit of investment and market clearing in wind power systems," American Journal of Electrical and Electronic Engineering, Vol. 4, No. 3, pp. 85-91, 2016.
  33. P. Khazaei, S. M. Modares, M. Dabbaghjamanesh, M. Almousa, and A. Moeini, "A high efficiency DC/DC boost converterfor photovoltaic applications," International Journal of Soft Computing and Engineering (IJSCE), pp. 2231-2307, 2016.
  34. M. Rakhshan, N. Vafamand, M. Shasadeghi, M. Dabbaghjamanesh, and A. Moeini. "Design of networked polynomial control systems with random delays: sum of squares approach," International Journal of Automation and Control, Vol. 10, No. 1, pp. 73-86, 2016. https://doi.org/10.1504/IJAAC.2016.075146
  35. M. Biglarbegian, N. Shah, I. Mazhari, and B. Parkhideh, "Design considerations for high power density/efficient PCB embedded inductor," in IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA), pp. 247-252, Nov. 2015.
  36. H. Jafarian, I. Mazhari, B. Parkhideh, S. Trivedi, D. Somayajula, R. Cox, and S. Bhowmik, "Design and implementation of distributed control architecture of an AC-stacked PV inverter," in IEEE Energy Conversion Congress and Exposition (ECCE), pp. 1130-1135, Sep. 2015.
  37. M. Biglarbegian, B. Vatani, I. Mazhari, and B. Parkhideh, "Thermal storage capacity to enhance network flexibility in Dual Demand Side Management," in North American Power Symposium (NAPS), pp. 1-5, Oct. 2015.
  38. H. Jafarian, B. Parkhideh, J. Enslin, R. Cox, and S. Bhowmik, "On reactive power injection control of distributed grid-tied AC-stacked PV inverter architecture," Energy Conversion Congress and Exposition (ECCE), 2016.
  39. P. Khazaei, M. Dabbaghjamanesh, A. Kalantarzadeh, and H. Mousavi, "Applying the modified TLBO algorithm to solve the unit commitment problem," in 2016 World Automation Congress (WAC), pp. 1-6, Jul./Aug. 2016.
  40. M. K. Bakhshizadeh, M. Najjar, F. Blaabjerg, and R. Sajadi, "Using variable DC sources in order to improve the voltage quality of a multilevel STATCOM with low frequency modulation," in 18th European Conference on Power Electronics and Applications (EPE'16 ECCEEurope), Sep. 2016.