Common-Mode Voltage Elimination with an Auxiliary Half-Bridge Circuit for Five-Level Active NPC Inverters

  • Le, Quoc Anh (Department of Electrical Engineering, Yeungnam University) ;
  • Park, Do-Hyeon (Department of Electrical Engineering, Yeungnam University) ;
  • Lee, Dong-Choon (Department of Electrical Engineering, Yeungnam University)
  • Received : 2017.01.06
  • Accepted : 2017.03.08
  • Published : 2017.07.20


This paper proposes a novel scheme which can compensate the common-mode voltage (CMV) for five-level active neutralpoint clamped (5L-ANPC) inverters, which is based on modifying the space vector pulse width modulation (SVPWM) and adding an auxiliary leg to the inverter. For the modified SVPWM, only the 55 voltage vectors producing low CMV values among the 125 possible voltage vectors are utilized, which varies over the three voltage levels of $-V_{dc}/12$, 0 V, and $V_{dc}/12$. In addition, the compensating voltage, which is injected into the 5L-ANPC inverter system to cancel the remaining CVM through a common-mode transformer (CMT) is generated by the additional NPC leg. By the proposed method, the CMV of the inverter is fully eliminated, while the utilization of the DC-link voltage is not decreased at all. Furthermore, all of the DC-link and flying capacitor voltages of the inverter are well controlled. Simulation and experimental results have verified the validity of the proposed scheme.


Supported by : National Research Foundation


  1. J. Rodriguez, S. Bernet, B. Wu, J. O. Pontt, and S. Kouro, "Multilevel voltage-source-converter topologies for industrial medium-voltage drives," IEEE Trans. Ind. Electron., Vol. 54, No. 6, pp. 2930-2945, Dec. 2007.
  2. S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, J. Rodriguez, M. A. Perez, and J. I. Leon, "Recent advances and industrial applications of multilevel converters," IEEE Trans. Ind. Electron., Vol. 57, No. 8, pp. 2553-2580, Aug. 2010.
  3. H. Abu-Rub, J. Holtz, and J. Rodriguez, "Medium-voltage multilevel converters - State of the art, challenges, and requirements in industrial applications," IEEE Trans. Ind. Electron., Vol. 57, No. 8, pp. 2581-2596, Aug. 2010.
  4. S. Ogasawara, H. Ayano, and H. Akagi, "An active circuit for cancellation of common-mode voltage generated by a PWM inverter," IEEE Trans. Power Electron., Vol. 13, No. 5, pp. 835-841, Sep. 1998.
  5. C. Mei, J. C. Balda, and W. P. Waite, "Cancellation of common-mode voltages for induction motor drives using active method," IEEE Trans. Energy Convers., Vol. 21, No. 2, pp. 380-386, Jun. 2006.
  6. H. J. Kim, H. D. Lee, and S. K. Sul, "A new PWM strategy for common-mode voltage reduction in neutral-point-clamped inverter-fed AC motor drives," IEEE Trans. Ind. Appl., Vol. 37, No. 6, pp. 1840-1845, Nov./Dec. 2001.
  7. M. M. Renge and H. M. Suryawanshi, "Five-level diode clamped inverter to eliminate common mode voltage and reduce dv/dt in medium voltage rating induction motor drives," IEEE Trans. Power Electron., Vol. 23, No. 4, pp. 1598-1607, Jul. 2008.
  8. A. Videt, P. Le Moigne, N. Idir, P. Baudesson, and X. Cimetiere, "A new carrier-based PWM providing common-mode-current reduction and DC-bus balancing for three-level inverters," IEEE Trans. Ind. Electron., Vol. 54, No. 6, pp. 3001-3011, 2007.
  9. A. K. Gupta and A. M. Khambadkone, "A space vector PWM scheme to reduce common mode voltage for a cascaded multilevel inverter," in 37th IEEE Power Electronics Specialists Conference, pp. 1-7, 2006.
  10. J. Liu, Q. Ge, X. Wang, and L. Tan, "Common-mode voltage reduction method for three-level NPC converter," in 2013 International Conference on Electrical Machines and Systems, ICEMS 2013, pp. 1826-1829, 2013.
  11. S. K. Mun and S. Kwak, "Reducing common-mode voltage of three-phase VSIs using the predictive current control method based on reference voltage," Journal of Power Electronics, Vol. 15, No. 3, pp. 712-720, May 2015.
  12. A. Ojha, P. Chaturvedi, A. Mittal, and S. Jain, "Carrier based common mode voltage reduction techniques in neutral point clamped inverter based AC-DC-AC drive system," Journal of Power Electronics, Vol. 16, No. 1, pp. 142-152, Jan. 2016.
  13. K. R. M. N. Ratnayake and Y. Murai, "A novel PWM scheme to eliminate common-mode voltage in three-level voltage source inverter," in PESC 98 Record. 29th Annual IEEE Power Electronics Specialists Conference (Cat. No.98CH36196), 1998, Vol. 1, pp. 269-274.
  14. A. Choudhury, S. Member, P. Pillay, S. S. Williamson, and S. Member, "Modified DC-bus voltage balancing algorithm for a drive with reduced common-mode voltage," IEEE Trans. Ind. Appl., Vol. 52, No. 1, pp. 278-292, Jan./Feb. 2016.
  15. Q. A. Le, S. Lee, and D.-C. Lee, "Common-mode voltage elimination for medium-voltage three-level NPC inverters based on an auxiliary circuit," Journal of Power Electronics, Vol. 16, No. 6, pp. 2076-2084, Dec. 2016.
  16. K. Wang, Z. Zheng, Y. Li, L. Xu, and H. Ma, "Multi-objective optimization PWM control for a back-to-back five-level ANPC converter," in 2012 IEEE Energy Conversion Congress and Exposition (ECCE), pp. 3514-3519, 2012.
  17. Q. A. Le and D. C. Lee, "A novel SVPWM scheme for common-mode voltage reduction in five-level active NPC inverters," in 2015 9th International Conference on Power Electronics - ECCE Asia (ICPE-ECCE Asia), pp. 281-287, 2015.
  18. J.-S. Lee and K.-B. Lee, "New modulation techniques for a leakage current reduction and a neutral-point voltage balance in transformerless photovoltaic systems using a three-level inverter," IEEE Trans. Power Electron., Vol. 29, No. 4, pp. 1720-1732, Apr. 2014.
  19. M. C. Cavalcanti, A. M. Farias, K. C. Oliveira, F. A. S. Neves, and J. L. Afonso, "Eliminating leakage currents in neutral point clamped inverters for photovoltaic systems," IEEE Trans. Ind. Electron., Vol. 59, No. 1, pp. 435-443, Jan. 2012.
  20. P. Barbosa, P. Steimer, J. Steinke, M. Winkelnkemper, and N. Celanovic, "Active-neutral-point-clamped (ANPC) multilevel converter technology," in 2005 European Conference on Power Electronics and Applications, pp. 1-10, 2005.
  21. "ACS2000 medium voltage industrial drives." [Online]. Available: [Accessed: 20-May-2016].
  22. K. Wang, Z. Zheng, Y. Li, K. Liu, and J. Shang, "Neutral-point potential balancing of a five-level active neutral-point-clamped inverter," IEEE Trans. Ind. Electron., Vol. 60, No. 5, pp. 1907-1918, May 2013.
  23. G. Tan, Q. Deng, and Z. Liu, "An optimized SVPWM strategy for five-level active NPC (5L-ANPC) converter," IEEE Trans. Power Electron., Vol. 29, No. 1, pp. 386-395, Jan. 2014.