3-Level T-type Inverter Operation Method Using Level Change

  • Kim, Tae-Hun (Dept. of Electrical, Electronic and Control Engineering, Hankyong National University) ;
  • Lee, Woo-Cheol (Dept. of Electrical, Electronic and Control Engineering, Hankyong National University, Institute for information technology convergence)
  • 투고 : 2017.03.08
  • 심사 : 2017.09.26
  • 발행 : 2018.01.01


In this study, a selective inverter operation between a 2-level voltage source converter (VSC) and a 3-level T-type VSC (3LT VSC) is proposed to improve the efficiency of a 3LT VSC. The 3LT VSC topology, except for its neutral-point switches, has similar operations as that of the 2-level VSC. If an operation mode is changed according to efficiency, the efficiency can be improved because efficiencies of each methods are depending on current and MI (Modulation Index). The proposed method calculates the power losses of the two topologies and operates as the having lower losses. To calculate the losses, the switching and conduction losses based on the operation mode of each topology were analyzed. The controller determined the operation mode of the 2- or 3-level VSC based on the power loss calculated during every cycle. The validity of the proposed control scheme was investigated through simulation and experiments. The waveform and average efficiency of each method were compared.

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Fig. 1. Operation areas based on phase angle of outputvoltage and inductor current in A-phase

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Fig. 2. 3-phase 2-level VSC circuit

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Fig. 3. 3LT VSC circuit

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Fig. 4. Block diagram of proposed method sequence

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Fig. 5. Simulation waveform (fs = 10 kHz, Rload = 48 Ω) :(a) output phase voltage Van, Vbn, and Vcn, (b)inductor current iaL, ibL, and icL, (c) 2-level A-phaseloss calculation Pa2 and 3-level A-phase losscalculation Pa3, (d) Pa3 - Pa2

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Fig. 6. Simulation efficiency with R load (3 kW, 6 kW)

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Fig. 7. 2-level operation mode waveform: Ch1 outputvoltage, Van (250 V/div), Ch2 inverter voltage, Vainv(250 V/div), Ch3 inductor current, iaL (10 A/div)

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Fig. 8. 3-level operation mode waveform: Ch1 outputvoltage, Van (250 V/div), Ch2 inverter voltage, Vainv(250 V/div), Ch3 inductor current, iaL (10 A/div)

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Fig. 9. Proposed method waveform: Ch1 output voltage,Van (250 V/div), Ch2 inverter voltage, Vainv (250V/div), Ch3 inductor current, iaL (10 A/div), Ch4Pa3 ? Pa2 value (5 W/div)

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Fig. 10. Proposed method waveform with RL load: Ch1output voltage, Van (250 V/div), Ch2 invertervoltage, Vainv (250 V/div), Ch3 load current, iLoad(10 A/div)

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Fig. 11. Experiment efficiency with R load (3 kW, 6 kW)

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Fig. 12. Experiment efficiency with R load (1 kW, 2 kW)

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Fig. 13. Experiment efficiency with RL load (1 kW, 2 kW)

Table 1. 2-level VSC switching and conduction losses

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Table 2. 3LT VSC switching and conduction losses

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Table 3. System parameter

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연구 과제 주관 기관 : National Research Foundation of Korea(NRF)


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