An Optimization Design of the Diode Clamped Multi-Level Converter for Coaxial Inductive Power Transfer on the Low Voltage DC Micro-grid

  • Pairindra, Worapong (Dept. of Electrical Engineering, Faculty of Engineering, King Mongkut's Institute of Technology Ladkrabang) ;
  • Khomfoi, Surin (Dept. of Electrical Engineering, Faculty of Engineering, King Mongkut's Institute of Technology Ladkrabang)
  • Received : 2016.11.06
  • Accepted : 2017.10.21
  • Published : 2018.01.01


This proposed paper aims for the high efficiency contactless power transfer in household dc power distribution. A 300 W five-level diode clamped multi-level converter with 300 Vdc input dc link bus is employed for the power transferring task and the output voltage range is controlled at 48 Vdc. The inner and outer solenoid coils are used for inductive power transfer (IPT) transformer with the 200 kHz switching frequency for designed power density. Therefore, to achieve the converter efficiency above 95%, the LLC series resonant with fundamental harmonic analysis (FHA) and the calculated switching angles are used as an optimized tool for designing the system resonant tank. The validations of this approached topology are illustrated in both MATLAB/Simulink simulation and implementation.

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Fig. 1. Coaxial contactless transformer ideal concept design

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Fig. 2. The structure of DCML with IPT schematic

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Fig. 3. (a) Simplified system circuit (b) Linear sinusoidcircuit

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Fig. 4. Voltage gain vs nomalized frequency

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Fig. 5. Operation boundary design

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Fig. 6. The five-level diode clamped mutilevel converterscheme

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Fig. 7. Upper portion switching toplogy

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Fig. 8. Switching angles vs modulation index

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Fig. 9. Operation mode of DCML and resonant circuit

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Fig. 10. Operation mode 1(Negative current)

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Fig. 11. Operation mode 1(Positive current)

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Fig. 12. Operation mode 2

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Fig. 13. Operation mode 3

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Fig. 14. Operation mode 4

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Fig. 15. Operation mode 5 (Positive current)

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Fig. 16. Operation mode 5 (Negative current)

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Fig. 17. Operation mode 6

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Fig. 18. Operation mode 7

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Fig. 19. Operation mode 8

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Fig. 20. The SHE %THD vs modulation index

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Fig. 21. 3rd harmonic elimination vs modulation index

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Fig. 22. 5th harmonic elimination vs modulation index

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Fig. 23. VDS1 vs S1 current

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Fig. 24. VDS2 vs S2 current

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Fig. 25. VDS3 vs S3 current

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Fig. 26. VDS4 vs S4 current

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Fig. 27.Switching gain boundary

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Fig. 28. VDS1 and current at 100 W and 300W

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Fig. 29. The DCML output voltage and voltage harmonicspectrum (CH I 200 V/DIV, FFT 50.0V/DIV, 312.5kHz/DIV, Sa 12.5 NSa)

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Fig. 30. VDS1 and current of S1 (ID1 2A/DIV, VDS1 50V/DIV)

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Fig. 31. VDS2 and current of S2 (ID2 2A/DIV, VDS2 50V/DIV)

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Fig. 32. VDS3 and current of S3 (ID3 2A/DIV, VDS3 50V/DIV)

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Fig. 33. VDS4 and current of S4 (ID4 2A/DIV, VDS4 50V/DIV)

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Fig. 34. Prototype experimental setup

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Fig. 35. Switching losses in DCML swtiching devices

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Fig. 36. The DCML ZVS under load variation (Ir 10A/DIV,Vprimary 100V/DIV, T 2 μS/DIV)

Table 1. LLC Series resonant system gain design

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Table 2. Diode clamped multi-level switching state

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Table 3. Specification of the prototype converter

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Table 4. Diode clamped multi-level converter components

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Table 5. Contactless transformer specification

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