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REFERENCE LINKING PLATFORM OF KOREA S&T JOURNALS
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Journal of information and communication convergence engineering
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The Korean Institute of Information and Commucation Engineering
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Volume & Issues
Volume 12, Issue 4 - Dec 2014
Volume 12, Issue 3 - Sep 2014
Volume 12, Issue 2 - Jun 2014
Volume 12, Issue 1 - Mar 2014
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Performance Evaluation of Parallel Opportunistic Multihop Routing
Shin, Won-Yong ;
Journal of information and communication convergence engineering, volume 12, issue 3, 2014, Pages 135~139
DOI : 10.6109/jicce.2014.12.3.135
Opportunistic routing was originally introduced in various multihop network environments to reduce the number of hops in such a way that, among the relays that decode the transmitted packet for the current hop, the one that is closest to the destination becomes the transmitter for the next hop. Unlike the conventional opportunistic routing case where there is a single active S-D pair, for an ad hoc network in the presence of fading, we investigate the performance of parallel opportunistic multihop routing that is simultaneously performed by many source-destination (S-D) pairs to maximize the opportunistic gain, thereby enabling us to obtain a logarithmic gain. We first analyze a cut-set upper bound on the throughput scaling law of the network. Second, computer simulations are performed to verify the performance of the existing opportunistic routing for finite network conditions and to show trends consistent with the analytical predictions in the scaling law. More specifically, we evaluate both power and delay with respect to the number of active S-D pairs and then, numerically show a net improvement in terms of the power-delay trade-off over the conventional multihop routing that does not consider the randomness of fading.
Optimum Array Processing with Variable Linear Constraint
Chang, Byong Kun ;
Journal of information and communication convergence engineering, volume 12, issue 3, 2014, Pages 140~144
DOI : 10.6109/jicce.2014.12.3.140
A general linearly constrained adaptive array is examined in the weight vector space to illustrate the array performance with respect to the gain factor. A narrowband linear adaptive array is implemented in a coherent signal environment. It is shown that the gain factor in the general linearly constrained adaptive array has an effect on the linear constraint gain of the conventional linearly constrained adaptive array. It is observed that a variation of the gain factor of the general linearly constrained adaptive array results in a variation of the distance between the constraint plane and the origin in the translated weight vector space. Simulation results are shown to demonstrate the effect of the gain factor on the nulling performance.
Study of Modular Multiplication Methods for Embedded Processors
Seo, Hwajeong ; Kim, Howon ;
Journal of information and communication convergence engineering, volume 12, issue 3, 2014, Pages 145~153
DOI : 10.6109/jicce.2014.12.3.145
The improvements of embedded processors make future technologies including wireless sensor network and internet of things feasible. These applications firstly gather information from target field through wireless network. However, this networking process is highly vulnerable to malicious attacks including eavesdropping and forgery. In order to ensure secure and robust networking, information should be kept in secret with cryptography. Well known approach is public key cryptography and this algorithm consists of finite field arithmetic. There are many works considering high speed finite field arithmetic. One of the famous approach is Montgomery multiplication. In this study, we investigated Montgomery multiplication for public key cryptography on embedded microprocessors. This paper includes helpful information on Montgomery multiplication implementation methods and techniques for various target devices including 8-bit and 16-bit microprocessors. Further, we expect that the results reported in this paper will become part of a reference book for advanced Montgomery multiplication methods for future researchers.
ARP Modification for Prevention of IP Spoofing
Kang, Jung-Ha ; Lee, Yang Sun ; Kim, Jae Young ; Kim, Eun-Gi ;
Journal of information and communication convergence engineering, volume 12, issue 3, 2014, Pages 154~160
DOI : 10.6109/jicce.2014.12.3.154
The address resolution protocol (ARP) provides dynamic mapping between two different forms of addresses: the 32-bit Internet protocol (IP) address of the network layer and the 48-bit medium access control (MAC) address of the data link layer. A host computer finds the MAC address of the default gateway or the other hosts on the same subnet by using ARP and can then send IP packets. However, ARP can be used for network attacks, which are one of the most prevalent types of network attacks today. In this study, a new ARP algorithm that can prevent IP spoofing attacks is proposed. The proposed ARP algorithm is a broadcast ARP reply and an ARP notification. The broadcast ARP reply was used for checking whether the ARP information was forged. The broadcast ARP notification was used for preventing a normal host's ARP table from being poisoned. The proposed algorithm is backward compatible with the current ARP protocol and dynamically prevents any ARP spoofing attacks. In this study, the proposed ARP algorithm was implemented on the Linux operating system; here, we present the test results with respect to the prevention of ARP spoofing attacks.
A Review of Web Cache Prefetching
Deng, YuFeng ; Manoharan, Sathiamoorthy ;
Journal of information and communication convergence engineering, volume 12, issue 3, 2014, Pages 161~167
DOI : 10.6109/jicce.2014.12.3.161
Web caches help to reduce latencies arising from slow networks through storing and reusing what was used before. Repeat access to a cached resource does not incur network latencies. However, resources that have never been used will not be found in the cache. Cache prefetching is a technique that helps to fill a cache with still-unused resources in anticipation that these resources will be used in the near future. Typically these unused resources are related to the resources that have been accessed in the recent past. While web caching exploits temporal locality, prefetching attempts to exploit spatial locality. Access to the prefetched resources will be cache hits, and therefore reduces the latency as perceived by the user. This paper reviews the cache infrastructure supported by the hypertext transfer protocol and discusses web cache prefetching in general, including Mozilla's prefetching infrastructure. It then classifies and reviews some prefetching techniques.
Adaptive Real-Time Ship Detection and Tracking Using Morphological Operations
Arshad, Nasim ; Moon, Kwang-Seok ; Kim, Jong-Nam ;
Journal of information and communication convergence engineering, volume 12, issue 3, 2014, Pages 168~172
DOI : 10.6109/jicce.2014.12.3.168
In this paper, we propose an algorithm that can efficiently detect and monitor multiple ships in real-time. The proposed algorithm uses morphological operations and edge information for detecting and tracking ships. We used smoothing filter with a
Gaussian window and luminance component instead of RGB components in the captured image. Additionally, we applied Sobel operator for edge detection and a threshold for binary images. Finally, object labeling with connectivity and morphological operation with open and erosion were used for ship detection. Compared with conventional methods, the proposed method is meant to be used mainly in coastal surveillance systems and monitoring systems of harbors. A system based on this method was tested for both stationary and non-stationary backgrounds, and the results of the detection and tracking rates were more than 97% on average. Thousands of image frames and 20 different video sequences in both online and offline modes were tested, and an overall detection rate of 97.6% was achieved.
Research on Robustness of 2D DWT-Based Watermarking in Intermediate Viewpoint by 3D Warping
Park, Scott ; Choi, Hyun-Jun ; Yang, Won-Jae ; Kim, Dong-Wook ; Seo, Young-Ho ;
Journal of information and communication convergence engineering, volume 12, issue 3, 2014, Pages 173~180
DOI : 10.6109/jicce.2014.12.3.173
This paper investigates the robustness of watermarking techniques for stereo or multi-view images generated from texture and depth images. A three-dimensional (3D) warping technique is applied to texture and depth images to generate stereo or multi-view images for a 3D display. By using the 3D warping technique, in this paper, we developed watermarking techniques and evaluated the robustness of these techniques that can extract watermarks from texture images even when the viewpoints are moved. A depth image is used to generate a stereo image with the largest viewpoint difference to the left and right. The overlapping region in the stereo image that does not disappear after warping is then obtained, and DWT is applied to this region to embed a watermark in the LL sub-band. The proposed watermarking techniques were found to yield bit error rates of about 3%-16% when they were applied to stereo images generated from texture and depth images. Furthermore, the results showed that the copyright could be seen when the extracted watermark was visually confirmed.
Write Request Handling for Static Wear Leveling in Flash Memory (SSD) Controller
Choo, Chang ; Gajipara, Pooja ; Moon, Il-Young ;
Journal of information and communication convergence engineering, volume 12, issue 3, 2014, Pages 181~185
DOI : 10.6109/jicce.2014.12.3.181
The lifetime of a solid-state drive (SSD) is limited because of the number of program and erase cycles allowed on its NAND flash blocks. Data cannot be overwritten in an SSD, leading to an out-of-place update every time the data are modified. This result in two copies of the data: the original copy and a modified copy. This phenomenon is known as write amplification and adversely affects the endurance of the memory. In this study, we address the issue of reducing wear leveling through efficient handling of write requests. This results in even wearing of all the blocks, thereby increasing the endurance period. The focus of our work is to logically divert the write requests, which are concentrated to limited blocks, to the less-worn blocks and then measure the maximum number of write requests that the memory can handle. A memory without the proposed algorithm wears out prematurely as compared to that with the algorithm. The main feature of the proposed algorithm is to delay out-of-place updates till the threshold is reached, which results in a low overhead. Further, the algorithm increases endurance by a factor of the threshold level multiplied by the number of blocks in the memory.
Design Challenges and Solutions for Ultra-High-Density Monolithic 3D ICs
Panth, Shreepad ; Samal, Sandeep ; Yu, Yun Seop ; Lim, Sung Kyu ;
Journal of information and communication convergence engineering, volume 12, issue 3, 2014, Pages 186~192
DOI : 10.6109/jicce.2014.12.3.186
Monolithic three-dimensional integrated chips (3D ICs) are an emerging technology that offers an integration density that is some orders of magnitude higher than the conventional through-silicon-via (TSV)-based 3D ICs. This is due to a sequential integration process that enables extremely small monolithic inter-tier vias (MIVs). For a monolithic 3D memory, we first explore the static random-access memory (SRAM) design. Next, for digital logic, we explore several design styles. The first is transistor-level, which is a design style unique to monolithic 3D ICs that are enabled by the ultra-high-density of MIVs. We also explore gate-level and block-level design styles, which are available for TSV-based 3D ICs. For each of these design styles, we present techniques to obtain the graphic database system (GDS) layouts, and perform a signoff-quality performance and power analysis. We also discuss various challenges facing monolithic 3D ICs, such as achieving 50% footprint reduction over two-dimensional (2D) ICs, routing congestion, power delivery network design, and thermal issues. Finally, we present design techniques to overcome these challenges.
Development of an Edge-Based Algorithm for Moving-Object Detection Using Background Modeling
Shin, Won-Yong ; Kabir, M. Humayun ; Hoque, M. Robiul ; Yang, Sung-Hyun ;
Journal of information and communication convergence engineering, volume 12, issue 3, 2014, Pages 193~197
DOI : 10.6109/jicce.2014.12.3.193
Edges are a robust feature for object detection. In this paper, we present an edge-based background modeling method for the detection of moving objects. The edges in the image frames were mapped using robust Canny edge detector. Two edge maps were created and combined to calculate the ultimate moving-edge map. By selecting all the edge pixels of the current frame above the defined threshold of the ultimate moving edges, a temporary background-edge map was created. If the frequencies of the temporary background edge pixels for several frames were above the threshold, then those edge pixels were treated as background edge pixels. We conducted a performance comparison with previous works. The existing edge-based moving-object detection algorithms pose some difficulty due to the changes in background motion, object shape, illumination variation, and noises. The result of the performance evaluation shows that the proposed algorithm can detect moving objects efficiently in real-world scenarios.