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REFERENCE LINKING PLATFORM OF KOREA S&T JOURNALS
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Journal of Power Electronics
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Journal DOI :
The Korean Institute of Power Electronics
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Volume & Issues
Volume 14, Issue 6 - Nov 2014
Volume 14, Issue 5 - Sep 2014
Volume 14, Issue 4 - Jul 2014
Volume 14, Issue 3 - May 2014
Volume 14, Issue 2 - Mar 2014
Volume 14, Issue 1 - Jan 2014
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Lossless Snubber with Minimum Voltage Stress for Continuous Current Mode Tapped-Inductor Boost Converters for High Step-up Applications
Kang, Jeong-Il ; Han, Sang-Kyoo ; Han, Jonghee ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 621~631
DOI : 10.6113/JPE.2014.14.4.621
To invigorate the tapped-inductor boost (TIB) topology in emerging high step-up applications for off-grid products, a lossless snubber consisting of two capacitors and three diodes is proposed. Since the switch voltage stress is minimized in the proposed circuit, it is allowed to use a device with a lower cost, higher efficiency, and higher availability. Moreover, since the leakage inductance is fully utilized, no effort to minimize it is required. This allows for a highly productive and cost-effective design of the tapped-inductor. The proposed circuit also shows a high step-up ratio and provides relaxation of the switching loss and diode reverse-recovery. In this paper, the operation is analyzed in detail, the steady-state equation is derived, and the design considerations are discussed. Some experimental results are provided to confirm the validity of the proposed circuit.
Analysis and Design of a High-Efficiency Boundary Conduction Mode Tapped-Inductor Boost LED Driver for Mobile Products
Kang, Jeong-Il ; Han, Sang-Kyoo ; Han, Jonghee ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 632~640
DOI : 10.6113/JPE.2014.14.4.632
For low-power high-frequency LED driver applications in small form factor mobile products, a high-efficiency boundary conduction mode tapped-inductor boost converter is proposed. In the proposed converter, the switch and the diode achieve soft-switching, the diode reverse-recovery is alleviated, and the switching frequency is very insensitive to output voltage variations. The circuit is quantitatively characterized, and the design guidelines are presented. Experimental results from an LED backlight driver prototype for a 14 inch notebook computer are also presented.
Design and Analysis of an Interleaved Boundary Conduction Mode (BCM) Buck PFC Converter
Choi, Hangseok ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 641~648
DOI : 10.6113/JPE.2014.14.4.641
This paper presents the design considerations and analysis for an interleaved boundary conduction mode power factor correction buck converter. A thorough analysis of the harmonic content of the AC line current is presented to examine the allowable voltage gain (K value) for meeting the EN61000-3-2, Class D standard while maximizing efficiency. The results of the harmonic analysis are used to derive the required value of K and therefore the output voltage necessary to meet the class D requirements for a given AC line voltage. The discussed design consideration and harmonic current analysis are verified on a 300W universal line experimental prototype converter with an 80V output. The measured efficiencies remain above 96% down to 20% of the full load. The input current harmonics also meet the IEC61000-3-2 (class D) standard.
Non-isolated Bidirectional Soft-switching SEPIC/ZETA Converter with Reduced Ripple Currents
Song, Min-Sup ; Son, Young-Dong ; Lee, Kwang-Hyun ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 649~660
DOI : 10.6113/JPE.2014.14.4.649
A novel non-isolated bidirectional soft-switching SEPIC/ZETA converter with reduced ripple currents is proposed and characterized in this study. Two auxiliary switches and an inductor are added to the original bidirectional SEPIC/ZETA components to form a new direct power delivery path between input and output. The proposed converter can be operated in the forward SEPIC and reverse ZETA modes with reduced ripple currents and increased voltage gains attributed to the optimized selection of duty ratios. All switches in the proposed converter can be operated at zero-current-switching turn-on and/or turn-off through soft current commutation. Therefore, the switching and conduction losses of the proposed converter are considerably reduced compared with those of conventional bidirectional SEPIC/ZETA converters. The operation principles and characteristics of the proposed converter are analyzed in detail and verified by the simulation and experimental results.
Interleaved ZVS DC/DC Converter with Balanced Input Capacitor Voltages for High-voltage Applications
Lin, Bor-Ren ; Chiang, Huann-Keng ; Wang, Shang-Lun ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 661~670
DOI : 10.6113/JPE.2014.14.4.661
A new DC/DC converter with zero voltage switching is proposed for applications with high input voltage and high load current. The proposed converter has two circuit modules that share load current and power rating. Interleaved pulse-width modulation (PWM) is adopted to generate switch control signals. Thus, ripple currents are reduced at the input and output sides. For high-voltage applications, each circuit module includes two half-bridge legs that are connected in series to reduce switch voltage rating to
. These legs are controlled with the use of asymmetric PWM. To reduce the current rating of rectifier diodes and share load current for high-load-current applications, two center-tapped rectifiers are adopted in each circuit module. The primary windings of two transformers are connected in series at the high voltage side to balance output inductor currents. Two series capacitors are adopted at the AC terminals of the two half-bridge legs to balance the two input capacitor voltages. The resonant behavior of the inductance and capacitance at the transition interval enable MOSFETs to be switched on under zero voltage switching. The circuit configuration, system characteristics, and design are discussed in detail. Experiments based on a laboratory prototype are conducted to verify the effectiveness of the proposed converter.
A New Basic Unit for Cascaded Multilevel Inverters with the Capability of Reducing the Number of Switches
Laali, Sara ; Babaei, Ebrahim ; Sharifian, Mohammad Bagher Bannae ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 671~677
DOI : 10.6113/JPE.2014.14.4.671
In this paper, a new basic unit is proposed. Then, a cascaded multilevel inverter basded on the series connection of n number of these new basic units is proposed. In order to generate all of the voltage levels (even and odd) at the output, three different algorithms to determine the magnitude of the dc voltage source are proposed. Reductions in the number of power switches, driver circuits and dc voltage sources in addition to increases in the numbr of output voltage levels are some of the advantages of the proposed cascaded multilevel inverter. These results are obtained through a comparison of the proposed inverter and its algorithms with an H-bridge cascaded multilevel inverter from the point of view of the number of power electronic devices. Finally, the capability of the proposed topology with its proposed algorithms in generating all of the voltage levels is verified through experimental results on a laboratorary prototype of a 49-level inverter.
Novel Three-Phase PWM Voltage-Fed Rectifier with an Auxiliary Resonant Commutated Pole Link
Qu, Ke-Qing ; Zhao, Jin-Bin ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 678~686
DOI : 10.6113/JPE.2014.14.4.678
A novel auxiliary resonant commutated pole (ARCP) link for three-phase PWM voltage-fed converter is presented. The ARCP link consists of two auxiliary switches, one resonant inductance, and six diodes, which is simpler than the conventional ARCP designs. Based on the phase and amplitude control, the proposed converter can take a minimum switching times PWM method, which results in reduced losses and a simplified control. In addition, the zero-voltage resonance modes are analyzed. Finally, simulation and experimental results show that the system can realize zero-voltage switching with a unity power factor.
Implementation of Thrust Ripple Reduction for a Permanent Magnet Linear Synchronous Motor Using an Adaptive Feed Forward Controller
Baratam, Arundhati ; Karlapudy, Alice Mary ; Munagala, Suryakalavathi ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 687~694
DOI : 10.6113/JPE.2014.14.4.687
This paper focuses on the analysis and compensation of thrust ripples in permanent magnet linear synchronous motors (PMLSM). The main drawback in PMLSMs is the presence of thrust ripples, which are mainly due to the interaction between the permanent magnets and armature slotted core. These thrust ripples reduce the performance of the drive system in high precision applications especially at low speeds. This paper analyzes thrust ripples using the discrete wavelet transform. These undesired thrust ripples are compensated by using an adaptive feed forward controller. It is observed that this novel controller reduces about 65 percent of the thrust ripples. An extensive simulation is performed through MATLAB and it is validated through experimental results using a d-SPACE system with a DS1104 control board.
Fault Tolerant Control of DC-Link Voltage Sensor for Three-Phase AC/DC/AC PWM Converters
Kim, Soo-Cheol ; Nguyen, Thanh Hai ; Lee, Dong-Choon ; Lee, Kyo-Beum ; Kim, Jang-Mok ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 695~703
DOI : 10.6113/JPE.2014.14.4.695
In this paper, a fault detection scheme for DC-link voltage sensor and its fault tolerant control strategy for three-phase AC/DC/AC PWM converters are proposed, where the Luenberger observer is applied to estimate the DC-link voltage. The Luenberger observer is based on a converter model, which is derived from the voltage equations of a grid-side converter and the power balance on a DC link. A fault of the voltage sensor is detected by comparing the measured value of the DC-link voltage with the estimated one. When a sensor fault is detected, a fault tolerant control strategy is performed, where the estimated DC-link voltage is used for the feedback control. The estimation error from the observer is about 1.5 V, which is sufficiently accurate for feedback control. In addition, it is shown that the observer performance is robust to parameter variations of the converter. The validity of the proposed method has been verified by simulation and experimental results.
Design and Stability Analysis of a Fuzzy Adaptive SMC System for Three-Phase UPS Inverter
Naheem, Khawar ; Choi, Young-Sik ; Mwasilu, Francis ; Choi, Han Ho ; Jung, Jin-Woo ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 704~711
DOI : 10.6113/JPE.2014.14.4.704
This paper proposes a combined fuzzy adaptive sliding-mode voltage controller (FASVC) for a three-phase UPS inverter. The proposed FASVC encapsulates two control terms: a fuzzy adaptive compensation control term, which solves the problem of parameter uncertainties, and a sliding-mode feedback control term, which stabilizes the error dynamics of the system. To extract precise load current information, the proposed method uses a conventional load current observer instead of current sensors. In addition, the stability of the proposed control scheme is fully guaranteed by using the Lyapunov stability theory. It is shown that the proposed FASVC can attain excellent voltage regulation features such as a fast dynamic response, low total harmonic distortion (THD), and a small steady-state error under sudden load disturbances, nonlinear loads, and unbalanced loads in the existence of the parameter uncertainties. Finally, experimental results are obtained from a prototype 1 kVA three-phase UPS inverter system via a TMS320F28335 DSP. A comparison of these results with those obtained from a conventional sliding-mode controller (SMC) confirms the superior transient and steady-state performances of the proposed control technique.
A Simple Grid-Voltage-Sensorless Control Scheme for PFC Boost Converters
Nguyen, Cong-Long ; Lee, Hong-Hee ; Chun, Tae-Won ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 712~721
DOI : 10.6113/JPE.2014.14.4.712
This paper introduces a simple grid-voltage-sensorless control scheme for single-phase power factor correction (PFC) boost converters. The grid voltage waveform is obtained based on the dc output voltage, the switching duty ratio, and a phase-lead compensator. In addition, the duty ratio feedback is utilized to obtain the unity input power factor and the zero harmonic current. The proposed control scheme is designed and mathematically analyzed based on a small-signal model of PFC boost converters. To verify the effectiveness of the proposed control scheme, several simulations and experiments are carried out in two applications: an industrial power system with a 60 Hz grid frequency and a commercial aircraft application with a 400 Hz grid frequency.
Improved Global Maximum Power Point Tracking Method Based on Voltage Interval for PV Array under Partially Shaded Conditions
Ding, Kun ; Wang, Xiang ; Zhai, Quan-Xin ; Xu, Jun-Wei ; Zhang, Jing-Wei ; Liu, Hai-Hao ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 722~732
DOI : 10.6113/JPE.2014.14.4.722
The power-voltage (P-V) curve of photovoltaic (PV) arrays connected in parallel to bypass diodes would have several local maximum power points (LMPP) under partial shading conditions (PSC). Conventional maximum power point tracking (MPPT) methods fail to search for the global maximum power point (MPP) because the searched peak point may remain at the LMPP on the P-V curve under PSC. This study proposes an improved MPPT algorithm to ensure that PV arrays operate at global maximum power point (GMPP) under PSC. The proposed algorithm is based on a critical study and a series of observations of PV characteristics under PSC. Results show the regularity of voltage interval between LMPPs. The algorithm has the advantages of rapidly reaching GMPP, maintaining stability, and recovering GMPP quickly when the operating condition changes. Simulation and experimental results demonstrate the feasibility of the proposed algorithm.
FPGA-based Centralized Controller for Multiple PV Generators Tied to the DC Bus
Ahmed, Ashraf ; Ganeshkumar, Pradeep ; Park, Joung-Hu ; Lee, Hojin ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 733~741
DOI : 10.6113/JPE.2014.14.4.733
The integration of photovoltaic (PV) energy sources into DC grid has gained considerable attention because of its enhanced conversion efficiency with reduced number of power conversion stages. During the integration process, a local control unit is normally included with every power conversion stage of the PV source to accomplish the process of maximum power point tracking. A centralized monitoring and supervisory control unit is required for monitoring, power management, and protection of the entire system. Therefore, we propose a field-programmable gate array (FPGA) based centralized control unit that integrates all local controllers with the centralized monitoring unit. The main focus of this study is on the process of integrating many local control units into a single central unit. In this paper, we present design and optimization procedures for the hardware implementation of FPGA architecture. Furthermore, we propose a transient analysis and control design methodology with consideration of the nonlinear characteristics of the PV source. Hardware experiment results verify the efficiency of the central control unit and controller design.
Automatic Power Factor Correction Using a Harmonic-Suppressed TCR Equipped with a New Adaptive Current Controller
Obais, Abdulkareem Mokif ; Pasupuleti, Jagadeesh ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 742~753
DOI : 10.6113/JPE.2014.14.4.742
In this paper, a new continuously and linearly controlled capacitive static VAR compensator is proposed for the automatic power factor correction of inductive single phase loads in 220V 50Hz power system networks. The compensator is constructed of a harmonic-suppressed TCR equipped with a new adaptive current controller. The harmonic-suppressed TCR is a new configuration that includes a thyristor controlled reactor (TCR) shunted by a passive third harmonic filter. In addition, the parallel configuration is connected to an AC source via a series first harmonic filter. The harmonic-suppressed TCR is designed so that negligible harmonic current components are injected into the AC source. The compensator is equipped with a new adaptive closed loop current controller, which responds linearly to reactive current demands. The no load operating losses of this compensator are negligible when compared to its capacitive reactive current rating. The proposed system is validated on PSpice which is very close in terms of performance to real hardware.
Development of a Control Algorithm for a Static VAR Compensator Used in Industrial Networks
Spasojevic, Ljubisa ; Papic, Igor ; Blazic, Bostjan ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 754~763
DOI : 10.6113/JPE.2014.14.4.754
In this paper a method for the development of a static VAR compensator (SVC) control algorithm is presented. The proposed algorithm has been designed with the objective of eliminating the negative impact of electric arc furnaces on the power system. First, a mathematical model of the proposed SVC controller in the d-q synchronous rotating coordinate system is developed. An analysis under dynamic and steady state conditions is also carried out. The efficiency of the presented controller is demonstrated by means of computer simulations of an actual steel-factory network model. The major advantages of the proposed controller are better flicker compensation, increased ability to regulate voltage and the need for only one-point network measurements.
Adaptive DC-link Voltage Control for Shunt Active Power Filter
Wang, Yu ; Xie, Yun-Xiang ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 764~777
DOI : 10.6113/JPE.2014.14.4.764
This study analyzes the mathematical relationship between DC-link voltage and system parameters for shunt active power filters (APFs). Analysis and mathematical deduction are used to determine the required minimum DC-link voltage for APF. A novel adaptive DC-link voltage controller for the three-phase four-wire shunt APF is then proposed. In this controller, the DC-link voltage reference value will be maintained at the required minimum voltage level. Therefore, power consumption and switching loss will effectively decrease. The DC-link voltage can also adaptively yield different DC-link voltage levels based on different harmonic currents and grid voltage levels and thus avoid the effects of harmonic current and grid voltage fluctuation on compensation performance. Finally, representative simulation and experimental results in a three-phase four-wire center-split shunt APF are presented to verify the validity and effectiveness of the minimum DC-link voltage design and the proposed adaptive DC-link voltage controller.
One-Cycle Control Strategy with Active Damping for AC-DC Matrix Converter
Liu, Xiao ; Zhang, Qingfan ; Hou, Dianli ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 778~787
DOI : 10.6113/JPE.2014.14.4.778
This study presents an input filter resonance mitigation method for an AC-DC matrix converter. This method combines the advantages of the one-cycle control strategy and the active damping technique. Unnecessary sensors are removed, and system cost is reduced by employing the grid-side input currents as feedback to damp out LC resonance. A model that includes the proposed method and the input filter is established with consideration of the delay caused by the actual controller. A zero-pole map is employed to analyze model stability and to investigate virtual resistor parameter design principles. Based on a double closed-loop control scheme, the one-cycle control strategy does not require any complex modulation index control. Thus, this strategy can be more easily implemented than traditional space vector-based methods. Experimental results demonstrate the veracity of theoretical analysis and the feasibility of the proposed approach.
Dynamic Paralleling Behaviors of High Power Trench and Fieldstop IGBTs
Wu, Yu ; Sun, Yaojie ; Lin, Yandan ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 788~795
DOI : 10.6113/JPE.2014.14.4.788
This paper demonstrates the dynamic behaviors of paralleled high power IGBTs using trench and fieldstop technologies. Four IGBTs are paralleled and standard deviation is adopted to represent the imbalance. Experiments are conducted under three different operation conditions and at different temperatures ranging from
. The experimental results show that operation at very low and very high temperatures usually aggravates the switching behaviors. There is a trade-off between the balance and the losses at low temperatures. These results can help in the design of heat sinks in paralleling applications confronting very low temperatures.
Digital Controller Candidate for Point-of-load Synchronous Buck Converter in Tri-mode Mechanism
Xiu, Li-Mei ; Zhang, Wei-Ping ; Li, Bo ; Liu, Yuan-Sheng ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 796~805
DOI : 10.6113/JPE.2014.14.4.796
A digital controller with a low-power approach for point-of-load synchronous buck converters is discussed and compared with its analog counterpart to confirm its feasibility for system integration. The tri-mode digital controller IC in
CMOS process is presented to demonstrate solutions that include a PID, quarter PID, and robust RST compensators. These compensators address the steady-state, stand-by, and transient modes according to the system operating point. An idle-tone free condition for
DPWM reduces the inherent tone noise under DC-excitation. Compared with that of the traditional approach, this condition generates a quasi-pure modulation signal. Experimental results verify the closed-loop performances and confirm the power-saving mechanism of the proposed controller.
Scattering Parameter-based Measurement of Planar EMI filter
Wang, Shishan ; Gong, Min ; Xu, Chenchen ;
Journal of Power Electronics, volume 14, issue 4, 2014, Pages 806~813
DOI : 10.6113/JPE.2014.14.4.806
Planar electromagnetic interference (EMI) filters are widely used to restrain the conducted EMI of switching power supplies. Such filters are characterized by small size, low parasitic parameters, and better high-frequency performance than the passive discrete EMI filter. However, EMI filter performance cannot be exactly predicted by using existing methods. Therefore, this paper proposes a method to use scattering parameters (S-parameters) for the measurement of EMI filter performance. A planar EMI filter sample is established. From this sample, the relationship between S-parameters and insertion gain (IG) of EMI filter is derived. To determine the IG under different impedances, the EMI filter is theoretically calculated and practically measured. The differential structure of the near-field coupling model is also deduced, and the IG is calculated under standard impedance conditions. The calculated results and actual measurements are compared to verify the feasibility of the theory.