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REFERENCE LINKING PLATFORM OF KOREA S&T JOURNALS
> Journal Vol & Issue
JSTS:Journal of Semiconductor Technology and Science
Journal Basic Information
Journal DOI :
The Institute of Electronics Engineers of Korea
Editor in Chief :
Volume & Issues
Volume 2, Issue 4 - Dec 2002
Volume 2, Issue 3 - Sep 2002
Volume 2, Issue 2 - Jun 2002
Volume 2, Issue 1 - Mar 2002
Selecting the target year
Accurate Formulas for Frequency-Dependent Resistance and Inductance Per Unit Length of On-Chip Interconnects on Lossy Silicon Substrate
Ymeri, H. ; Nauwelaers, B. ; Maex, K. ; Roest, D.De ; Vandenberghe, S. ; Stucchi, M. ;
JSTS:Journal of Semiconductor Technology and Science, volume 2, issue 1, 2002, Pages 1~6
A new closed-form expressions to calculate frequency-dependent distributed inductance and the associated distributed series resistance of single interconnect on a lossy silicon substrate (CMOS technology) are presented. The proposed analytic model for series impedance is based on a self-consistent field method and the vector magnetic potential equation. It is shown that the calculated frequency-dependent distributed inductance and the associated resistance are in good agreement with the results obtained from rigorous full wave solutions and CAD-oriented equivalent-circuit modeling approach.
Single-ended Differential RF Circuit Topologies Utilizing Complementary MOS Devices
Kim, Bonkee ; Ilku Nam ; Lee, Kwyro ;
JSTS:Journal of Semiconductor Technology and Science, volume 2, issue 1, 2002, Pages 7~18
Single-ended differential RF circuit topologies fully utilizing complementary characteristics of both NMOS and PMOS are proposed, which have inherent advantage of both single-ended and differential circuits. Using this concept, we propose a CCPP (Complementary CMOS parallel push-pull) amplifier which has single-ended input/output with differential amplifying characteristics, leading to more than 30 dB improvement on
. In addition, complementary resistive mixer is also proposed, which provides not only differential IF outputs from single-ended RF input, but much better linearity as well as isolation characteristics. Experimental results using
CMOS process show that, compared with conventional NMOS resistive mixer, the proposed mixer shows 15 dB better LO-to-IF isolation, 4.6 dB better
, and 4.5 dB better
A Simple and Analytical Design Approach for Input Power Matched On-chip CMOS LNA
Kim, Tae-Wook ; Lee, Kwyro ;
JSTS:Journal of Semiconductor Technology and Science, volume 2, issue 1, 2002, Pages 19~29
A simple and analytical design approach for input power matched CMOS RF LNA circuits and their scaling for lower power consumption, is introduced. In spite of the simplicity of our expressions, it gives excellent agreement with numerical simulation results using commercial CAD tools for several circuit examples performed at 2.4GHz using
CMOS technology. These simple and analytical results are extremely useful in that they can provide enough insights not only for designing any CMOS LNA circuits, but also for characterizing and diagnosing them whether being prototyped or manufactured.
2.45GHz CMOS Up-conversion Mixer & LO Buffer Design
Park, Jin-Young ; Lee, Sang-Gug ; Hyun, Seok-Bong ; Park, Kyung-Hwan ; Park, Seong-Su ;
JSTS:Journal of Semiconductor Technology and Science, volume 2, issue 1, 2002, Pages 30~40
A 2.45GHz double-balanced modified Gilbert-type CMOS up-conversion mixer design is introduced, where the PMOS current-reuse bleeding technique is demonstrated to be efficient in improving conversion gain, linearity, and noise performance. An LO buffer is included in the mixer design to perform single-ended to differential conversion of the LO signal on chip. Simulation results of the design based on careful modeling of all active and passive components are examined to explain in detail about the characteristic improvement and degradation provided by the proposed design. Two kinds of chips were fabricated using a standard
CMOS process, one of which is the mixer chip without the LO buffer and the other is the one with it. The measured characteristics of the fabricated chips are quite excellent in terms of conversion gain, linearity, and noise, and they are in close match to the simulation results, which demonstrates the adequacy of the modeling approach based on the macro models for all the active and passive devices used in the design. Above all the benefits provided by the current-reuse bleeding technique, the improvement in noise performance seems most valuable.
Fractional-N Frequency Synthesizer with a l-bit High-Order Interpolative
Modulator for 3G Mobile Phone Application
Park, Byeong-Ha ;
JSTS:Journal of Semiconductor Technology and Science, volume 2, issue 1, 2002, Pages 41~48
This paper presents a 18-mW, 2.5-㎓ fractional-N frequency synthesizer with l-bit
-order interpolative delta-sigma (
)modulator to suppress fractional spurious tones while reducing in-band phase noise. A fractional-N frequency synthesizer with a quadruple prescaler has been designed and implemented in a
BiCMOS. Synthesizing 2.1 GHzwith less than 200 Hz resolution, it exhibits an in-band phase noise of less than -85 dBc/Hz at 1 KHz offset frequency with a reference spur of -85 dBc and no fractional spurs. The synthesizer also shows phase noise of -139 dBc/Hz at an offset frequency of 1.2 MHz from a 2.1GHz center frequency.
Monolithically Integrable RF MEMS Passives
Park, Eun-Chul ; Park, Yun-Seok ; Yoon, Jun-Bo ; Euisik Yoon ;
JSTS:Journal of Semiconductor Technology and Science, volume 2, issue 1, 2002, Pages 49~55
This paper presents high performance MEMS passives using fully CMOS compatible, monolithically integrable 3-D RF MEMS processes for RF and microwave applications. The 3-D RF MEMS technology has been developed and investigated as a viable technological option, which can break the limit of the conventional IC technology. We have demonstrated the versatility of the technology by fabricating various 3-D thick-metal microstructures for RF and microwave applications, such as spiral/solenoid inductors, transformers, and transmission lines, with a vertical dimension of up to
. To the best of our knowledge, we report that we are the first to construct a fully integrated VCO with MEMS inductors, which has achieved a low phase noise of -124 dBc/Hz at 300 kHz offset from a center frequency of 1 GHz.
Spiral Inductor Design for Quality Factor
Lee, Sang-Gug ; Kim, Sin-Cheol ;
JSTS:Journal of Semiconductor Technology and Science, volume 2, issue 1, 2002, Pages 56~58
A closed form expression for the quality factor of the spiral inductor, methodologically, is presented as a function of the inductance (
), metal-line width (W), spacing (S), inner and the diameter (
). For a given inductance, the dependences of quality factor on W, S, and
are analyzed, and suggested the design optimization guidelines.
A Self-Consistent Semi-Analytical Model for AlGaAs/InGaAs PMHEMTs
Abdel Aziz, M. ; El-Banna, M. ; El-Sayed, M. ;
JSTS:Journal of Semiconductor Technology and Science, volume 2, issue 1, 2002, Pages 59~69
A semi-analytical model based on exact numerical analysis of the 2DEG channel in pseudo-morphic HEMT (PMHEMT) is presented. The exactness of the model stems from solving both Schrodinger's wave equation and Poisson's equation simultaneously and self-consistently. The analytical modeling of the device terminal characteristics in relation to the charge control model has allowed a best fit with the geometrical and structural parameters of the device. The numerically obtained data for the charge control of the channel are best fitted to analytical expressions which render the problem analytical. The obtained good agreement between experimental and modeled current/voltage characteristics and small signal parameters has confirmed the validity of the model over a wide range of biasing voltages. The model has been used to compare both the performance and characteristics of a PMHEMT with a competetive HEMT. The comparison between the two devices has been made in terms of 2DEG density, transfer characteristics, transconductance, gate capacitance and unity current gain cut-off frequency. The results show that PMHEMT outperforms the conventional HEMT in all considered parameters.
A New Basic Element for Neural Logic Functions and Capability in Circuit Applications
Omura, Yasuhisa ;
JSTS:Journal of Semiconductor Technology and Science, volume 2, issue 1, 2002, Pages 70~81
This paper describes a new basic element which shows a synaptic operation for neural logic applications and shows function feasibility. A key device for the logic operation is the insulated-gate pn-junction device on SOI substrates. The basic element allows an interface quite compatible to that of conventional CMOS circuits and vMOS circuits.
Particular aspects of drivers for VCSELs operating at multi-Gb/s
Kyriakis-Bitzaros, Efstathios D. ; Katsafouros, Stavros G. ; Halkias, George ;
JSTS:Journal of Semiconductor Technology and Science, volume 2, issue 1, 2002, Pages 82~86
It is demonstrated that the conventional current-pulse laser drivers are not adequate in driving VCSELs operating at multi-Gb/s speeds. Simulation results, including the bonding parasitics, show that high-performance VCSELs are more efficiently driven using voltage-pulse mode of operation. The optical output power is almost doubled in the voltage-mode of operation, while the total electrical power consumption of the transmitter decreases by 20%.
A Method for Measurement of Limiting Intrinsic Non-Uniformity Due to Process in CCD-Multiplexers for Focal Plane Arrays
Bhan, R.K. ; Saxena, R.S. ;
JSTS:Journal of Semiconductor Technology and Science, volume 2, issue 1, 2002, Pages 87~92
We present a simple experimental method for determination of limiting intrinsic fixed-pattern non-uniformity (NU) due to fabrication process in two-dimensional CCD multiplexers (MUXs) that are used for hybrid focal plane arrays. Here, this is done by determining separately the two NUs viz. that are
independent. From these measurements, process dependent NU can be extracted. It is argued that
dependent NU can be eliminated by designing novel input circuits whereas
independent NU, primarily, dependent on process control and material variations may be reduced but cannot be eliminated completely and hence limits the FPA performance eventually.