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REFERENCE LINKING PLATFORM OF KOREA S&T JOURNALS
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Journal DOI :
Electronics and Telecommunications Research Institute
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Volume & Issues
Volume 23, Issue 4 - Dec 2001
Volume 23, Issue 3 - Sep 2001
Volume 23, Issue 2 - Jun 2001
Volume 23, Issue 1 - Mar 2001
Selecting the target year
-Doped Selenide Glasses for Potential
Optical Amplifier Materials
Choi, Yong-Gyu ; Park, Bong-Je ; Kim, Kyong-Hon ; Heo, Jong ;
ETRI Journal, volume 23, issue 3, 2001, Pages 97~97
emission originated from
-doped selenide glasses was investigated under an optical pump of a conventional 1480 nm laser diode. The measured peak wavelength and fullwidth at half-maximum of the fluorescent emission are ~1650nm and 120nm, respectively. A moderate lifetime of the thermally coupled upper manifolds of
together with a high stimulated emission cross-section of
promises to be useful for
band fiber-optic amplifiers that can be pumped with an existing high-power 1480 nm laser diode. Codoping
enhances the emission intensity by way of a nonradiative
energy transfer. The Dexter model based on the spectral overlap between donor emission and acceptor absorption describes well the energy transfer from
in these glasses. Also discussed in this paper are major transmission loss mechanisms of a selenide glass optical fiber.
A Novel Method of All-Optical Switching: Quantum Router
Ham, Byoung-Seung ;
ETRI Journal, volume 23, issue 3, 2001, Pages 106~106
Subpicosecond all-optical switching method based on the simultaneous two-photon coherence exchange is proposed and numerically demonstrated. The optical switching mechanism is based on the optical field induced dark resonance swapping via nondegenerate four-wave mixing processes. For potential applications of ultrafast all-optical switching in fiber-optic communications, 10-THz channel number independent quantum router is discussed.
Configuration of ACK Trees for Multicast Transport Protocols
Koh, Seok-Joo ; Kim, Eun-Sook ; Park, Ju-Young ; Kang, Shin-Gak ; Park, Ki-Shik ; Park, Chee-Hang ;
ETRI Journal, volume 23, issue 3, 2001, Pages 111~111
For scalable multicast transport, one of the promising approaches is to employ a control tree known as acknowledgement (ACK) tree which can be used to convey information on reliability and session status from receivers to a root sender. The existing tree configuration has focused on a 'bottom-up' scheme in which ACK trees grow from leaf receivers toward a root sender. This paper proposes an alternative 'top-down' configuration where an ACK tree begins at the root sender and gradually expands by including non-tree nodes into the tree in a stepwise manner. The proposed scheme is simple and practical to implement along with multicast transport protocols. It is also employed as a tree configuration in the Enhanced Communications Transport Protocol, which has been standardized in the ITU-T and ISO/IEC JTC1. From experimental simulations, we see that the top-down scheme provides advantages over the existing bottom-up one in terms of the number of control messages required for tree configuration and the number of tree levels.
Performance Evaluation of the Physical Layer of the DSRC Operating in 5.8 GHz Frequency Band
Lee, Byung-Seub ; Yim, Choon-Sik ; Ahn, Dong-Hyun ; Oh, Deock-Gil ;
ETRI Journal, volume 23, issue 3, 2001, Pages 121~121
In this paper, the theoretical as well as experimental results of BER characteristics of three different modulation schemes, ASK, FSK and BPSK, in a multi-path Rician channel are addressed. These BER characteristics are analyzed as a function of
and the power ratio of the line of sight (LOS) component to the Rayleigh scattered component. The theoretical as well as computer simulation results shows the ASK is the most suitable modulation scheme for the dedicated short range communication (DSRC) in terms of implemental cost and system complexity. The decision feedback equalizer is proved to be very effective in canceling the multi-path interference in the DSRC channel environment. The simulation result of the equalized ASK, reveals the performance enhancement achievable with decision feedback (DFE) equalizer for the first generation DSRC system. The multi-ray DSRC channel model is also provided to predict the received carrier power and fluctuation, which are quite dependent on the surroundings of a cell.
A Cost Effective Reference Data Sampling Algorithm Using Fractal Analysis
Lee, Byoung-Kil ; Eo, Yang-Dam ; Jeong, Jae-Joon ; Kim, Yong-Il ;
ETRI Journal, volume 23, issue 3, 2001, Pages 129~129
A random sampling or systematic sampling method is commonly used to assess the accuracy of classification results. In remote sensing, with these sampling methods, much time and tedious work are required to acquire sufficient ground truth data. So, a more effective sampling method that can represent the characteristics of the population is required. In this study, fractal analysis is adopted as an index for reference sampling. The fractal dimensions of the whole study area and the sub-regions are calculated to select sub-regions that have the most similar dimensionality to that of the whole area. Then the whole area's classification accuracy is compared with those of sub-regions, and it is verified that the accuracies of selected sub-regions are similar to that of whole area. A new kind of reference sampling method using the above procedure is proposed. The results show that it is possible to reduce sampling area and sample size, while keeping the same level of accuracy as the existing methods.
Efficient Path Delay Test Generation for Custom Designs
Kang, Sung-Ho ; Underwood, Bill ; Law, Wai-On ; Konuk, Haluk ;
ETRI Journal, volume 23, issue 3, 2001, Pages 138~138
Due to the rapidly growing complexity of VLSI circuits, test methodologies based on delay testing become popular. However, most approaches cannot handle custom logic blocks which are described by logic functions rather than by circuit primitive elements. To overcome this problem, a new path delay test generation algorithm is developed for custom designs. The results using benchmark circuits and real designs prove the efficiency of the new algorithm. The new test generation algorithm can be applied to designs employing intellectual property (IP) circuits whose implementation details are either unknown or unavailable.