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REFERENCE LINKING PLATFORM OF KOREA S&T JOURNALS
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Journal DOI :
Electronics and Telecommunications Research Institute
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Volume & Issues
Volume 25, Issue 6 - Dec 2003
Volume 25, Issue 5 - Oct 2003
Volume 25, Issue 4 - Aug 2003
Volume 25, Issue 3 - Jun 2003
Volume 25, Issue 2 - Apr 2003
Volume 25, Issue 1 - Feb 2003
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Self-Pulsation in Multisection Distributed Feedback Laser Diode with a Novel Dual Grating Structure
Park, Kyung-Hyun ; Leem, Young-Ahn ; Yee, Dae-Su ; Baek, Yong-Soon ; Kim, Dong-Churl ; Kim, Sung-Bock ; Sim, Eun-Deok ;
ETRI Journal, volume 25, issue 3, 2003, Pages 149~149
A self-pulsating multisection distributed-feedback laser diode (DFB LD) can potentially realize all-optical clock extraction. This device generally consists of three sections, two DFB sections and one waveguide section. The most important variable in this device is detuning, which is the relative spectral position between the stop bands of two DFB sections. We fabricated a novel structure in which two gratings were located one over and one under the active layers. Each grating structure was independently defined in processing so that detuning, which is the prerequisite for self-pulsation, could be easily controlled. Observing various self-pulsating phenomena in these devices under several detuning conditions, we characterized the phenomena as dispersive Q-switching, mode beating, and self-mode-locking.
Gamut Compression and Extension Algorithms Based on Observer Experimental Data
Kang, Byoung-Ho ; Morovic, Jan ; Luo, M. Ronnier ; Cho, Maeng-Sub ;
ETRI Journal, volume 25, issue 3, 2003, Pages 156~156
Gamut compression algorithms have traditionally been defined functionally and then tested with deductive methods, e.g., psychophysical experiments. Our study offers an alternative, an inductive method, in which observers judge image colors to represent the original images more accurately. We developed a computer-controlled interactive tool that modifies the color appearance of pictorial images displayed on a monitor. In experiments, observers used the tool to alter color pixels according to the region of color space to which they belonged. We created three different gamut compression algorithms based on the observer experimental data. Observer groups evaluated the performance of the newly-developed algorithms, existing gamut compression algorithms, and an image based on the average observers' results from experiments in this study. The study of gamut extension is unlike the study of gamut compression in that it mainly deals with the degree of image pleasantness as judged by observers. The results of the gamut extension experiments in this study not only make available worthwhile data but also suggest a methodology for using the observer experimental tool for future gamut extension research.
An Efficient Adaptive Polarimetric Processor with an Embedded CFAR
Park, Hyung-Rae ; Kwag, Young-Kil ; Wang, Hong ;
ETRI Journal, volume 25, issue 3, 2003, Pages 171~171
To improve the detection performance of surveillance radars with polarization diversity, we developed an adaptive polarimetric processor and compared it with other polarimetric processors. We derived our adaptive polarimetric processor, called the polarization discontinuity detector (PDD), from the generalized likelihood ratio (GLR) test principle for the unspecified target component. We derived closed-form expressions of its probabilities of detection and false alarm, and compared its performance to that of the adaptive polarization canceller (APC) and Kelly's GLR processor. The PDD had a performance similar to Kelly's GLR in Gaussian clutter, and both the PDD and Kelly's GLR, which have embedded constant false alarm rates (CFARs), outperformed the APC, especially when the target polarization state was close to the clutter's polarization state. The important difference is that the PDD is much simpler than Kelly's GLR for hardware/software implementation, because the PDD does not require a costly two-parameter filter bank to cover the unknown target polarization state as Kelly's GLR does.
A Memory-Efficient Fingerprint Verification Algorithm Using a Multi-Resolution Accumulator Array
Pan, Sung-Bum ; Gil, Youn-Hee ; Moon, Dae-Sung ; Chung, Yong-Wha ; Park, Chee-Hang ;
ETRI Journal, volume 25, issue 3, 2003, Pages 179~179
Using biometrics to verify a person's identity has several advantages over the present practices of personal identification numbers (PINs) and passwords. At the same time, improvements in VLSI technology have recently led to the introduction of smart cards with 32-bit RISC processors. To gain maximum security in verification systems using biometrics, verification as well as storage of the biometric pattern must be done in the smart card. However, because of the limited resources (processing power and memory space) of the smart card, integrating biometrics into it is still an open challenge. In this paper, we propose a fingerprint verification algorithm using a multi-resolution accumulator array that can be executed in restricted environments such as the smart card. We first evaluate both the number of instructions executed and the memory requirement for each step of a typical fingerprint verification algorithm. We then develop a memory-efficient algorithm for the most memory-consuming step (alignment) using a multi-resolution accumulator array. Our experimental results show that the proposed algorithm can reduce the required memory space by a factor of 40 and can be executed in real time in resource-constrained environments without significantly degrading accuracy.
Efficient Path Delay Testing Using Scan Justification
Huh, Kyung-Hoi ; Kang, Yong-Seok ; Kang, Sung-Ho ;
ETRI Journal, volume 25, issue 3, 2003, Pages 187~187
Delay testing has become an area of focus in the field of digital circuits as the speed and density of circuits have greatly improved. This paper proposes a new scan flip-flop and test algorithm to overcome some of the problems in delay testing. In the proposed test algorithm, the second test pattern is generated by scan justification, and the first test pattern is processed by functional justification. In the conventional functional justification, it is hard to generate the proper second test pattern because it uses a combinational circuit for the pattern. The proposed scan justification has the advantage of easily generating the second test pattern by direct justification from the scan. To implement our scheme, we devised a new scan in which the slave latch is bypassed by an additional latch to allow the slave to hold its state while a new pattern is scanned in. Experimental results on ISCAS'89 benchmark circuits show that the number of testable paths can be increased by about 45 % over the conventional functional justification.
Trenched-Sinker LDMOSFET (TS-LDMOS) Structure for 2 GHz Power Amplifiers
Kim, Cheon-Soo ; Kim, Sung-Do ; Park, Mun-Yang ; Yu, Hyun-Kyu ;
ETRI Journal, volume 25, issue 3, 2003, Pages 195~195
This paper proposes a new LDMOSFET structure with a trenched sinker for high-power RF amplifiers. Using a low-temperature, deep-trench technology, we succeeded in drastically shrinking the sinker area to one-third the size of the conventional diffusion-type structure. The RF performance of the proposed device with a channel width of 5 mm showed a small signal gain of 16.5 dB and a maximum peak power of 32 dBm with a power-added efficiency of 25% at 2 GHz. Furthermore, the trench sinker, which was applied to the guard ring to suppress coupling between inductors, showed an excellent blocking performance below -40 dB at a frequency of up to 20 GHz. These results confirm that the proposed trenched sinker should be an effective technology both as a compact sinker for RF power devices and as a guard ring against coupling.
DC and RF Characteristics of
pMOSFETs: Enhanced Operation Speed and Low 1/f Noise
Song, Young-Joo ; Shim, Kyu-Hwan ; Kang, Jin-Young ; Cho, Kyoung-Ik ;
ETRI Journal, volume 25, issue 3, 2003, Pages 203~203
This paper reports on our investigation of DC and RF characteristics of p-channel metal oxide semiconductor field effect transistors (pMOSFETs) with a compressively strained
channel. Because of enhanced hole mobility in the
buried layer, the
pMOSFET showed improved DC and RF characteristics. We demonstrate that the 1/f noise in the
pMOSFET was much lower than that in the all-Si counterpart, regardless of gate-oxide degradation by electrical stress. These results suggest that the
pMOSFET is suitable for RF applications that require high speed and low 1/f noise.