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REFERENCE LINKING PLATFORM OF KOREA S&T JOURNALS
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The KIPS Transactions:PartA
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Korea Information Processing Society
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Volume & Issues
Volume 13A, Issue 7 - Dec 2006
Volume 13A, Issue 6 - Dec 2006
Volume 13A, Issue 5 - Oct 2006
Volume 13A, Issue 4 - Aug 2006
Volume 13A, Issue 3 - Jun 2006
Volume 13A, Issue 2 - Apr 2006
Volume 13A, Issue 1 - Feb 2006
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Design of an Embedded Linux File System with LZSS Algorithm for the PDA System
Jang Seung-Ju ;
The KIPS Transactions:PartA, volume 13A, issue 2, 2006, Pages 95~100
DOI : 10.3745/KIPSTA.2006.13A.2.095
I design an Embedded File System in Linux Operating System by applying modified LZSS compressed algorithm. This suggested Compressed File System which is modified file system of the Linux O.S saves the storage space. The compressed file system supports efficient use of storage space. The suggesting file system solves the small space of embedded system. The suggesting file system of this paper gives effect of the large storage space without extending the storage space.
An Area Efficient Low Power Data Cache for Multimedia Embedded Systems
Kim Cheong-Ghil ; Kim Shin-Dug ;
The KIPS Transactions:PartA, volume 13A, issue 2, 2006, Pages 101~110
DOI : 10.3745/KIPSTA.2006.13A.2.101
One of the most effective ways to improve cache performance is to exploit both temporal and spatial locality given by any program executional characteristics. This paper proposes a data cache with small space for low power but high performance on multimedia applications. The basic architecture is a split-cache consisting of a direct-mapped cache with small block sire and a fully-associative buffer with large block size. To overcome the disadvantage of small cache space, two mechanisms are enhanced by considering operational behaviors of multimedia applications: an adaptive multi-block prefetching to initiate various fetch sizes and an efficient block filtering to remove rarely reused data. The simulations on MediaBench show that the proposed 5KB-cache can provide equivalent performance and reduce energy consumption up to 40% as compared with 16KB 4-way set associative cache.
An Efficient P2Proxy Caching Scheme for VOD Systems
Kwon Chun-Ja ; Choi Chi-Kyu ; Lee Chi-Hun ; Choi Hwang-Kyu ;
The KIPS Transactions:PartA, volume 13A, issue 2, 2006, Pages 111~122
DOI : 10.3745/KIPSTA.2006.13A.2.111
As VOD service over the Internet becomes popular, a large sealable VOD system in P2P streaming environment has become increasing important. In this paper, we propose a new proxy caching scheme, called P2Proxy, to replace the traditional proxy with a sealable P2P proxy in P2P streaming environment. In the proposed scheme, each client in a group stores a different part of the stream from a server into its local buffer and then uses a group of clients as a proxy. Each client receives the request stream from other clients as long as the parts of the stream are available in the client group. The only missing parts of the stream which are not in the client group are directly received from the server. We represent the caching process between clients in a group and a server and then describe a group creation process. This paper proposes the directory structure to share the caching information among clients. By using the directory information, we minimize message exchange overload for a stream caching and playing. We also propose a recovery method for failures about the irregular behavior of P2P clients. In this paper, we evaluate the performance of our proposed scheme and compare the performance with the existing P2P streaming systems.
A Dynamic Prefetch Filtering Schemes to Enhance Usefulness Of Cache Memory
Chon Young-Suk ; Lee Byung-Kwon ; Lee Chun-Hee ; Kim Suk-Il ; Jeon Joong-Nam ;
The KIPS Transactions:PartA, volume 13A, issue 2, 2006, Pages 123~136
DOI : 10.3745/KIPSTA.2006.13A.2.123
The prefetching technique is an effective way to reduce the latency caused memory access. However, excessively aggressive prefetch not only leads to cache pollution so as to cancel out the benefits of prefetch but also increase bus traffic leading to overall performance degradation. In this thesis, a prefetch filtering scheme is proposed which dynamically decides whether to commence prefetching by referring a filtering table to reduce the cache pollution due to unnecessary prefetches In this thesis, First, prefetch hashing table 1bitSC filtering scheme(PHT1bSC) has been shown to analyze the lock problem of the conventional scheme, this scheme such as conventional scheme used to be N:1 mapping, but it has the two state to 1bit value of each entries. A complete block address table filtering scheme(CBAT) has been introduced to be used as a reference for the comparative study. A prefetch block address lookup table scheme(PBALT) has been proposed as the main idea of this paper which exhibits the most exact filtering performance. This scheme has a length of the table the same as the PHT1bSC scheme, the contents of each entry have the fields the same as CBAT scheme recently, never referenced data block address has been 1:1 mapping a entry of the filter table. On commonly used prefetch schemes and general benchmarks and multimedia programs simulates change cache parameters. The PBALT scheme compared with no filtering has shown enhanced the greatest 22%, the cache miss ratio has been decreased by 7.9% by virtue of enhanced filtering accuracy compared with conventional PHT2bSC. The MADT of the proposed PBALT scheme has been decreased by 6.1% compared with conventional schemes to reduce the total execution time.
Performance and Scalability of OpenMP Programs on Chip-MultiThreading Server
Lee Myung-Ho ; Kim Yong-Kyu ;
The KIPS Transactions:PartA, volume 13A, issue 2, 2006, Pages 137~146
DOI : 10.3745/KIPSTA.2006.13A.2.137
Shared Memory Multiprocessor (SMP) systems adopting Chip-level MultiThreading (CMT) technology are becoming mainstream servers in commercial applications and High Performance Computining (HPC) applications as well. OpenMP has become the standard paradigm to parallelize applications for SMP mostly because of its ease of use. As the demand for more computing power in HPC applications is growing rapidly, obtaining high performance and scalability for these applications parallelized using OpenMP API's will become more important. In this paper, we study the performance and scalability of HPC applications parallelized using OpenMP, SPEC OMPL (standard OpenMP benchmark suite), on the Sun Fire E25K server which adopts CMT technology. We also study the effect of CMT on SPEC OMPL.
R-CAT: Resilient Capacity-Aware Multicast Tree Construction Scheme
Kim Eun-Seok ; Han Sae-Young ; Park Sung-Yong ;
The KIPS Transactions:PartA, volume 13A, issue 2, 2006, Pages 147~156
DOI : 10.3745/KIPSTA.2006.13A.2.147
Recently, streaming service accounts for large part of internet traffic and it is becoming the most popular service. Because of P2P's scalability, P2P-based streaming system is proposed. There are frequent leave and join of a node. To overcome the group dynamics, Multiple Multicast Trees Methods were suggested. However, since they did not consider discrepancy in peers' capacity, it may cause the trees to be long and unstable. So we suggest Resilient Capacity-Aware Multicast Tree construction scheme (R-CAT) that promotes superior peer to upper position in the tree and construct more stable and short multicast trees. By simulation we can show that R-CAT cost more overhead packets for tree joining process, but it reduce the end-to-end delay of the resulting tree and the number of packets lost during the node joining and leaving processes much more than SplitStream.
Comparative and Combined Performance Studies of OpenMP and MPI Codes
Lee Myung-Ho ;
The KIPS Transactions:PartA, volume 13A, issue 2, 2006, Pages 157~162
DOI : 10.3745/KIPSTA.2006.13A.2.157
Recent High Performance Computing (HPC) platforms can be classified as Shared-Memory Multiprocessors (SMP), Massively Parallel Processors (MPP), and Clusters of computing nodes. These platforms are deployed in many scientific and engineering applications which require very high demand on computing power. In order to realize an optimal performance for these applications, it is crucial to find and use the suitable computing platforms and programming paradigms. In this paper, we use SPEC HPC 2002 benchmark suite developed in various parallel programming models (MPI, OpenMP, and hybrid of MPI/OpenMP) to find an optimal computing environments and programming paradigms for them through their performance analyses.
Comparative Study on Static Task Scheduling Algorithms in Global Heterogeneous Environment
Kim Jung-Hwan ;
The KIPS Transactions:PartA, volume 13A, issue 2, 2006, Pages 163~170
DOI : 10.3745/KIPSTA.2006.13A.2.163
Most scheduling problems including DAG(Directed Acyclic Graph)-based are known to be NP-complete, so many heuristic-based scheduling algorithms have been researched. HEFT and CPOP are such algorithms which have been devised to be effective in heterogeneous environment. We proposed, in the previous research, three scheduling algorithms which are effective in realistic global heterogeneous environment: CPOC, eCPOPC and eCPOP. In this paper, the heuristics which are used in the above five algorithms will be systematically analyzed. Those algorithms will be also studied experimentally using various benchmarks. Experimental results show that the eCPOC generates better schedules than any other algorithms and the heuristics which are used in the proposed algorithms are effective in the global heterogeneous environment.
Energy-Efficient and Parameterized Designs for Fast Fourier Transform on FPGAs
Jang Ju-Wook ; Han Woo-Jin ; Choi Seon-Il ; Govindu Gokul ; Prasanna Viktor K. ;
The KIPS Transactions:PartA, volume 13A, issue 2, 2006, Pages 171~176
DOI : 10.3745/KIPSTA.2006.13A.2.171
In this paper, we develop energy efficient designs for the Fast Fourier Transform (FFT) on FPGAs. Architectures for FFT on FPGAs are designed by investigating and applying techniques for minimizing the energy dissipation. Architectural parmeters such as degrees of vertical and horizontal parallelism are identified and a design choices. We determine design trade-offs using high-level performance estimation to obtain energy-efficient designs. We implemented a set storage types as parameters, on Xilinx Vertex-II FPGA to verify the estimates. Our designs dissipate 57% to 78% less energy than the optimized designs from the Xilinx library. In terms of a comprehensive metric such as EAT (Energy-Area-Time), out designs offer performance improvements of 3-13x over the Xilinx designs.
A Scalable Semi-Implicit Method for Realtime Cloth Simulatio
Kim Myoung-Jun ;
The KIPS Transactions:PartA, volume 13A, issue 2, 2006, Pages 177~184
DOI : 10.3745/KIPSTA.2006.13A.2.177
Since well-known explicit methods for cloth simulation were regarded unstable for large time steps or stiff springs, implicit methods have been proposed to achieve the stability. Large time step makes the simulation fast, and large stiffness enables a less elastic cloth property. Also, there have been efforts to devise so-called semi-implicit methods to achieve the stability and the speed together. In this paper we improve Kang's method (Kang and Cho 2002), and thus devise a scalable method for cloth simulation that varies from an almost explicit to a full implicit method. It is almost as fast as explicit methods and, more importantly, almost as stable as implicit methods allowing large time steps and stiff springs. Furthermore, it has a less artificial damping than the previously proposed semi-implicit methods.