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REFERENCE LINKING PLATFORM OF KOREA S&T JOURNALS
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Journal of IKEEE
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Journal DOI :
Institude of Korean Electrical and Electronics Engineers
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Volume & Issues
Volume 17, Issue 4 - Dec 2013
Volume 17, Issue 3 - Sep 2013
Volume 17, Issue 2 - Jun 2013
Volume 17, Issue 1 - Mar 2013
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The Design of an Integrated Platform 4A DUOS for Mobile User Interface Development
Kang, Sunmee ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 89~95
DOI : 10.7471/ikeee.2013.17.2.089
Diverse operating systems and developed platforms of mobile devices are implemented by vendors exist. The software has to be developed by respective environment in designing the user interface of software. For the solution of the inconvenience, this paper proposes an integrated platform 4A DUOS for developing user interface independently. The proposed platform can use web language not dependent on various operating systems, and offer online access to API and component templates to provide the convenience of the user interface design. Also, the server with on board designed user interface implements the service to the user. Therefore, the users can design the independent user interface on various mobile devices by using only one source.
Study of Optimum Parameters for Improving QoS in Wireless LAN
Jin, Hyunjoon ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 96~103
DOI : 10.7471/ikeee.2013.17.2.096
Since multimedia data takes large part of realtime transmission in wireless communication environments such as IEEE 802.11, QoS issues became one of the important problems with network performance. 802.11e MAC provides differentiated services based on priority schemes to solve existing 802.11 MAC problems. The TXOP is an important factor with the priority to improve network performance and QoS because it defines the time duration in which multiple frames can be transferred at one time for each station. In this paper, therefore frame sizes, TXOP Limit, and Priority values in accordance with the number of stations are experimented and derived for best network performance and QoS. Using 802.11e standard parameters, simulation results show the best throughput when the number of stations is 5 and TXOP Limit value is 6.016ms. For fairness, the best result is achieved at 3.008ms of TXOP Limit value and 15-31 of CW(Contention Window) that is lower priority than CW 7-15.
A Smart Care Surveillance System supporting Various CCTV Cameras
Kim, Kyung-Tae ; Kim, Ki-Yong ; Seong, Dong-Su ; Lee, Keon-Bae ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 104~110
DOI : 10.7471/ikeee.2013.17.2.104
In this paper, we introduce a smart care surveillance system which can support various CCTV cameras. In order to monitor an emergency requester in case of emergency, the server performs automatical CCTV Pan, Tilt, and Zoom control based on the location coordinates of the emergency requester. Also, a server finds and tracks the emergency requester using image processing and the updated location information. We implement a smart care surveillance system using the Genetec SDK tool to support various CCTV cameras. The efficiency of the rescue operation with the smart care surveillance system can be improved because rescuer can quickly control and monitor the requester's CCTV images.
Applications and analysis on the subband nonlinear adaptive Volterra filter
Yang, Yoon Gi ; Byun, Hee Jung ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 111~118
DOI : 10.7471/ikeee.2013.17.2.111
In this paper, the subband nonlinear adaptive Volterra filters are introduced and its analysis are presented. From the eigenvalue analysis of the input correlation matrix, we show that the proposed subband adaptive Volterra filter has superior convergence performance as compared to the conventional one, which shows that the it can be useful for the recently proposed subband nonlinear adaptive echo canceller. Also, the optimum filter in each subband are introduced and verified from the computer simulations.
Design of Low-Area HEVC Core Transform Architecture
Han, Seung-Mok ; Nam, Woo-Jin ; Lee, Seongsoo ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 119~128
DOI : 10.7471/ikeee.2013.17.2.119
This paper proposes and implements an core transform architecture, which is one of the major processes in HEVC video compression standard. The proposed core transform architecture is implemented with only adders and shifters instead of area-consuming multipliers. Shifters in the proposed core transform architecture are implemented in wires and multiplexers, which significantly reduces chip area. Also, it can process from
blocks with common hardware by reusing processing elements. Designed core transform architecture in 0.13um technology can process a
block with 2-D transform in 130 cycles, and its gate count is 101,015 gates.
Structure Modeling of 100 V Class Super-junction Trench MOSFET with Specific Low On-resistance
Lho, Young Hwan ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 129~134
DOI : 10.7471/ikeee.2013.17.2.129
For the conventional power metal-oxide semiconductor field-effect transistor (MOSFET) device structure, there exists a tradeoff relationship between specific on-resistance (
) and breakdown voltage (
). In order to overcome the tradeoff relationship, a uniform super-junction (SJ) trench metal-oxide semiconductor field-effect transistor (TMOSFET) structure is studied and designed. The structure modeling considering doping concentrations is performed, and the distributions at breakdown voltages and the electric fields in a SJ TMOSFET are analyzed. The simulations are successfully optimized by the using of the SILVACO TCAD 2D device simulator, Atlas. In this paper, the specific on-resistance of the SJ TMOSFET is successfully obtained 0.96
, which is of lesser value than the required one of 1.2
at the class of 100 V and 100 A for BLDC motor.
A Ka-band 8-channel TX Active Module Design for Active Phased Array Antenna
Jung, Young-Bae ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 135~139
DOI : 10.7471/ikeee.2013.17.2.135
This paper presents the 8-channel active module operated in Ka-band. The module is designed for the mobile satellite communication antenna systems, and the module structure has the merit to minimize the size and weight of the antenna systems by 30% compared with the conventional systems using the active module composed of single channel. This module was designed to be optimally operated by prohibiting the electrical interference among the individual channels. From the test results of the fabricated 8-channel active module, it can be confirmed that the maximum channel gain error is
, the minimum channel output power is 21.5dBm, and the maximum gain variation by phase control is
Ka-band Microstrip Antenna Fed Circular Polarized Horn Array Antenna Design
Jung, Young-Bae ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 140~144
DOI : 10.7471/ikeee.2013.17.2.140
This paper presents the novel design of circular polarized Ka-band horn array antenna. The element antenna of the arrya is composed of two parts, microstrip patch and square horn, and the microstrip patch is fed by corner truncated microstrip patch for circular polarization. The patch antenna has the role of a feeder and polarizer of the horn, thus the whole size of the horn antennae can be considerably reduced. The
horn array was designed and fabricated by the spacing of
among the element horn. The element horn has typical gain of 8dBi and axial-ratio bandwidth of 4.9% at 3dB, and the minimum gain and axial-ratio bandwithd of the array is 14dBi and 8.2%.
Interference Cancellation System in Wireless Repeater Using Complex Signed Signed CMA Algorithm
Han, Yong Sik ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 145~150
DOI : 10.7471/ikeee.2013.17.2.145
In the paper, we propose a new CSS(Complex Signed-Signed) CMA(Constant Modulus Algorithm) algorithm for ICS(Interference Cancellation System). When the repeater get the feedback signal, the CSS CMA algorithm is proposed at the ICS repeater using DSP(Digital Signal Processing) for the removal of interfering signals from the feedback paths. The proposed CSS CMA algorithm improved performances and hardware complexity by adjusting step size values. the steady state MSE(Mean Square Error) performance of the proposed CSS CMA algorithm with step size of 0.00043 is about 4dB better than the conventional CMA algorithm. And the proposed Complex Signed Signed CMA algorithm requires 1950 ~ 2150 less iterations than the LMS(Least Mean Square) and Signed LMS(Normalized Least Mean Square) algorithms at MSE of -25dB.
A Comparison of the Fuzzy Display Methods for a Surface Deformation
Park, Min-Kee ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 151~158
DOI : 10.7471/ikeee.2013.17.2.151
There are several kind of surface deformation display methods using the fuzzy model. In this paper, we describe three fuzzy display methods for a surface deformation and perform a comparative analysis between the modified fuzzy display method and some conventional fuzzy display methods. In each method, the analysis will be performed through computer simulation in order to show the performance of each algorithm. The results show that the modified method have improved the realism and can be used better than the conventional methods in practical applications.
SOAP Performance Analysis
Song, Byungkwen ; Kang, Sunmee ; Lee, Sukhee ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 159~162
DOI : 10.7471/ikeee.2013.17.2.159
In this paper, we make a performance analysis of two kinds of platforms, JAVA and .NET, about SOAP(Simple Object Access Protocol). SOAP is able to use various transport layer protocol but in this paper we suggested methods of performance analysis with using HTTP, TCP, UDP and then we made an performance analysis on the basis of suggested methods. The results of performance analysis may be deduced differently by a system environment and loaded degree of network. Therefore, for precise performance analysis, we made same environment and proceeded.
PIMD Performance Test of Active Baseband Antenna
Kim, Jae-Hak ; Jung, Young-Bae ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 163~167
DOI : 10.7471/ikeee.2013.17.2.163
As the mobile services have been increased, the interference of the neighboring base stations is increased and the PIMD(Passive Inter-Modulation Distortion) has been a main issue for the design of base station antenna systems. In this paper, it is proposed the PIMD test method for the active basestation antenna whose radiators are directly connected with main active parts including amplifiers, and we presents its test results using a developed active basestation antenna. From the results, the active basestation antenna has the better PIMD performance than conventional passive structure by 8.4dB. The proposed PIMD test method can be used to get the accurate PIMD test result because the test environment is very similar with real basestation.
Memory Controller Architecture with Adaptive Interconnection Delay Estimation for High Speed Memory
Lee, Chanho ; Koo, Kyochul ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 168~175
DOI : 10.7471/ikeee.2013.17.2.168
The delay times due to the propagating of data on PCB depend on the shape and length of interconnection lines when memory controllers and high speed memories are soldered on the PCB. The dependency on the placement and routing on the PCB requires redesign of I/O logic or reconfiguration of the memory controller after the delay time is measured if the controller is programmable. In this paper, we propose architecture of configuring logic for the delay time estimation by writing and reading test patterns while initializing the memories. The configuration logic writes test patterns to the memory and reads them by changing timing until the correct patterns are read. The timing information is stored and the configuration logic configures the memory controller at the end of initialization. The proposed method enables easy design of systems using PCB by solving the problem of the mismatching caused by the variation of placement and routing of components including memories and memory controllers. The proposed method can be applied to high speed SRAM, DRAM, and flash memory.
A CMOS Impulse Radio Ultra-Wideband Receiver for Inner/Inter-chip Wireless Interconnection
Nguyen, Chi Nhan ; Duong, Hoai Nghia ; Dinh, Van Anh ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 176~181
DOI : 10.7471/ikeee.2013.17.2.176
This paper presents a CMOS impulse radio ultra-wideband (IR-UWB) receiver implemented using IBM 0.13um CMOS technology for inner/inter-chip wireless interconnection. The IR-UWB receiver is based on the non-coherent architecture which removes the complexity of RF architecture (such as DLL or PLL) and reduces power consumption. The receiver consists of three blocks: a low noise amplifier (LNA) with active balun, a correlator, and a comparator. Simulation results show the die area of the IR-UWB receiver of 0.2mm2, a power gain (S21) of 12.5dB, a noise figure (NF) of 3.05dB, an input return loss (S11) of less than -16.5dB, a conversion gain of 18dB, a NFDSB of 22. The receiver exhibits a third order intercept point (IIP3) of -1.3dBm and consumes 22.9mW of power on the 1.4V power supply.
Fabrication and characterization of n-IZO / p-Si and p-ZnO:(In, N) / n-Si thin film hetero-junctions by dc magnetron sputtering
Dao, Anh Tuan ; Phan, Thi Kieu Loan ; Nguyen, Van Hieu ; Le, Vu Tuan Hung ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 182~188
DOI : 10.7471/ikeee.2013.17.2.182
Using a ceramic target ZnO:In with In doping concentration of 2%, hetero-junctions of n-ZnO:In/p-Si and p-ZnO:(In, N)/n-Si were fabricated by depositing Indium doped n - type ZnO (ZnO:In or IZO) and Indium-nitrogen co-doped p - type ZnO (ZnO:(In, N)) films on wafers of p-Si (100) and n-Si (100) by DC magnetron sputtering, respectively. These films with the best electrical and optical properties were then obtained. The micro-structural, optical and electrical properties of the n-type and p-type semiconductor thinfilms were characterized by X-ray diffraction (XRD), RBS, UV-vis; four-point probe resistance and room-temperature Hall effect measurements, respectively. Typical rectifying behaviors of p-n junction were observed by the current-voltage (I-V) measurement. It shows fairly good rectifying behavior with the fact that the ideality factor and the saturation current of diode are n=11.5, Is=1.5108.10-7 (A) for n-ZnO:In/p-Si hetero-jucntion; n=10.14, Is=3.2689.10-5 (A) for p-ZnO:(In, N)/n-Si, respectively. These results demonstrated the formation of a diode between n-type thin film and p-Si, as well as between p-type thin film and n-Si..
Ergonomic Design of Voice Warning Sounds Used in Utility Helicopter
Jung, Jonghyuk ; Kim, Taekon ; Koh, Jinhwan ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 189~201
DOI : 10.7471/ikeee.2013.17.2.189
This paper presents an experimental study of the factors modulating the urgency perception of voice alarm generated by concatenative synthesizers. Four experiments were conducted using psycho-physical approach in which 112 participants made magnitude estimation for urgency perception of various voice alarm stimuli. Experiment 1 identified 6 acoustic and non-acoustic factors modulating the perceived urgency of synthesized voice alarm. Experiment 2, 3 and 4 quantified the relations between the objective changes in each of the quantifiable parameters and the subjective changes in urgency perception. This research has implications for the design and implementation of synthesized voice alarm systems where urgency mapping is required.
FPGA based Implementation of FAST and BRIEF algorithm for Object Recognition
Heo, Hoon ; Lee, Kwang-Yeob ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 202~207
DOI : 10.7471/ikeee.2013.17.2.202
This paper implemented the conventional FAST and BRIEF algorithm as hardware on Zynq-7000 SoC Platform. Previous feature-based hardware accelerator is mostly implemented using the SIFT or SURF algorithm, but it requires excessive internal memory and hardware cost. The proposed FAST & BRIEF accelerator reduces approximately 57% of internal memory usage and 70% of hardware cost compared to the conventional SIFT or SURF accelerator, and it processes 0.17 pixel per Clock.
The novel SCR-based ESD Protection Circuit with High Holding Voltage Applied for Power Clamp
Lee, Byung-Seok ; Kim, Jong-Min ; Byeon, Joong-Hyeok ; Park, Won-Suk ; Koo, Yong-Seo ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 208~213
DOI : 10.7471/ikeee.2013.17.2.208
In this paper, we proposed the novel SCR-based ESD protection circuit with high holding voltage for power clamp. In order to increase the holding voltage, the floating p+ and n+ to n-well and p-well, respectively, in the conventional SCR. The resulting increase of the holding voltage of the our proposed ESD circuit enables the high latch-up immunity. The electrical characteristics including ESD robustness of the proposed ESD circuit have been simulated using Synopsys TCAD simulator. According to the simulation result, the proposed device has higher holding voltage of 4.98 V than that of the conventional SCR protection circuit. Moreover, it is confirmed that the device could have the holding voltage of maximum 13.26 V with the size variation of floated diffusion area.
Small area LDO Regulator with pass transistor using body-driven technique
Park, Jun-Soo ; Yoo, Dae-Yeol ; Song, Bo-Bae ; Jung, Jun-Mo ; Koo, Yong-Seo ;
Journal of IKEEE, volume 17, issue 2, 2013, Pages 214~220
DOI : 10.7471/ikeee.2013.17.2.214
Small area LDO (Low drop-out) regulator with pass transistor using body-driven technique is presented in this paper. The body-driven technique can decrease threshold voltage (Vth) and increase the current ID flowing from drain to source in current. The technique is applied to the pass transistor to reduce size of area and maintain the same performance as conventional LDO regulator. A pass transistor using the technique can reduce its size by 5.5 %. The proposed LDO regulator works under the input voltage of 2.7 V ~ 4.5 V and provides up to 150mA load current for an output voltage range of 1.2 V ~ 3.3 V.