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REFERENCE LINKING PLATFORM OF KOREA S&T JOURNALS
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Journal of IKEEE
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Journal DOI :
Institude of Korean Electrical and Electronics Engineers
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Volume & Issues
Volume 17, Issue 4 - Dec 2013
Volume 17, Issue 3 - Sep 2013
Volume 17, Issue 2 - Jun 2013
Volume 17, Issue 1 - Mar 2013
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The study of shape of electrodes and I-V characteristics for Ultraviolet LED
Trung, Nguyen Huu ; Dang, Vu The ; Hieu, Nguyen Van ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 221~228
DOI : 10.7471/ikeee.2013.17.3.221
About functional parameters of a LED/UVLED (Light Emitting Diode/Ultra Violet LED), one of the most important parameters is the I-V characteristic. By researching factors affect to the I-V characteristic of uvled, we found that beside of the structure of the device itself, there is the influence of the electrode materials, electrode shapes, the process of wiring and packaging. In this work, we want to improve the performance of UVLED to find out the optimal mask design principles. The study is based on theoretical mathematical models, as well as the use of simulation software tool Comsol. From all results obtained, the team has improved mask design to manufacture electrodes for GaN-based UVLED. Electrode masks are designed by three softwares, which are Intellisuite, Klayout and AutoCad. Intellisuite masks would be used in fabrication simulation while Klayout and AutoCad are used to fabricate electrodes in experiments. As well as, we silmulated the structure of an uvled 355nm emission wavelength by TCAD software, in order to compare with uvled sample that has the same emission wavelength.
Electrical Conduction and Resistance Switching Mechanisms of Ag/ZnO/Ti Structure
Nguyen, Trung Do ; Pham, Kim Ngoc ; Tran, Vinh Cao ; TuanNguyen, Duy Anh ; Phan, Bach Thang ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 229~233
DOI : 10.7471/ikeee.2013.17.3.229
We investigated electrical conduction and resistance switching behavior of the Ag/ZnO/Ti structures for random access memory devices. These films were prepared on glass substrate by dc sputtering technique at room temperature. The resistance switching follows unipolar switching mode with small switching voltages (0.4 V - 0.6 V). Two electrical conduction mechanisms dominating the LRS and HRS are Ohmic and trap-controlled space charge limited current, respectively. These both conductions are consistent with the filamentary model. Based on the filamentary model, the switching mechanism was also interpreted.
The Incremental Delta-Sigma ADC for A Single-Electrode Capacitive Touch Sensor
Jung, Young-Jae ; Roh, Jeong-Jin ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 234~240
DOI : 10.7471/ikeee.2013.17.3.234
This paper presents an incremental delta-sigma analog-to-digital converter (ADC) for a single-electrode capacitive touch sensor. The second-order cascade of integrators with distributed feedback (CIFB) delta-sigma modulator with 1-bit quantization was fabricated by a
CMOS process. In order to achieve a wide input range in this incremental delta-sigma analog-to-digital converter, the shielding signal and the digitally controlled offset capacitors are used in front of a converter. This circuit operated at a supply voltage of 2.6 V to 3.7 V, and is suitable for single-electrode capacitive touch sensor for
input range with sub-fF resolution.
Proposed Efficient Architectures and Design Choices in SoPC System for Speech Recognition
Trang, Hoang ; Hoang, Tran Van ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 241~247
DOI : 10.7471/ikeee.2013.17.3.241
This paper presents the design of a System on Programmable Chip (SoPC) based on Field Programmable Gate Array (FPGA) for speech recognition in which Mel-Frequency Cepstral Coefficients (MFCC) for speech feature extraction and Vector Quantization for recognition are used. The implementing process of the speech recognition system undergoes the following steps: feature extraction, training codebook, recognition. In the first step of feature extraction, the input voice data will be transformed into spectral components and extracted to get the main features by using MFCC algorithm. In the recognition step, the obtained spectral features from the first step will be processed and compared with the trained components. The Vector Quantization (VQ) is applied in this step. In our experiment, Altera's DE2 board with Cyclone II FPGA is used to implement the recognition system which can recognize 64 words. The execution speed of the blocks in the speech recognition system is surveyed by calculating the number of clock cycles while executing each block. The recognition accuracies are also measured in different parameters of the system. These results in execution speed and recognition accuracy could help the designer to choose the best configurations in speech recognition on SoPC.
Architecture and Noise Analysis of Frequency Discriminators
Park, Sungkyung ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 248~253
DOI : 10.7471/ikeee.2013.17.3.248
Frequency detector is a circuit that converts the frequency to a digital representation and finds its application in various fields such as modulator and synchronization circuitry. In this paper, a couple of first-order and second-order frequency discriminator structures are modeled and analyzed with their quantization noise sources. Also a delta-sigma frequency detector architecture is proposed. Through theoretical analysis and derived equations, the output noise is obtained, which is validated by simulation. The proposed all-digital frequency discriminator may be applied in the feedback path of the all-digital phase-locked loop.
Active Selection of Label Data for Semi-Supervised Learning Algorithm
Han, Ji-Ho ; Park, Eun-Ae ; Park, Dong-Chul ; Lee, Yunsik ; Min, Soo-Young ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 254~259
DOI : 10.7471/ikeee.2013.17.3.254
The choice of labeled data in semi-supervised learning algorithm can result in effects on the performance of the resultant classifier. In order to select labeled data required for the training of a semi-supervised learning algorithm, VCNN(Vector Centroid Neural Network) is proposed in this paper. The proposed selection method of label data is evaluated on UCI dataset and caltech dataset. Experiments and results show that the proposed selection method outperforms conventional methods in terms of classification accuracy and minimum error rate.
The noise impacts of the open bit line and noise improvement technique for DRAM
Lee, Joong-Ho ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 260~266
DOI : 10.7471/ikeee.2013.17.3.260
The open bit line is vulnerable to noise compared to the folded bit line when read/write for the DRAM. According to the increasing DRAM densities, the core circuit operating conditions is exacerbated by the noise when it comes to the open bit line 6F2(F : Feature Size) structure. In this paper, the interference effects were analyzed by the data patterns between the bit line by experiments. It was beyond the scope of existing research. 68nm Tech. 1Gb DDR2, Advan Tester used in the experiments. The noise effects appears the degrade of internal operation margin of DRAM. This paper investigates sense amplifier power line splits by experiments. The noise can be improved by 0.2ns(1.3%)~1.9ns(12.7%), when the sense amplifier power lines split. It was simulated by 68nm Technology 1Gb DDR2 modeling.
A Design of PFM/PWM Dual Mode Feedback Based LLC Resonant Converter Controller IC for LED BLU
Yoo, Chang-Jae ; Kim, Hong-Jin ; Park, Young-Jun ; Lee, Kang-Yoon ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 267~274
DOI : 10.7471/ikeee.2013.17.3.267
This paper presents a design of LLC resonant converter IC for LED backlight unit based on PFM/PWM dual-mode feedback. Dual output LLC resonant architecture with a single inductor is proposed, where the master output is controlled by the PFM and slave output is controlled by the PWM. To regulate the master output PFM is used as feedback to control the frequency of the power switch. On the other hand, PWM feedback is used to control the pulse width of the power switch and to regulate the slave output. This chip is fabricated in 0.35um 2P3M BC(Bipolar-CMOS-DMOS) Process and the die area is
. Current consumptions is 26mA from 5V supply.
A 8-bit 10-MSample/s Folding & Interpolation ADC using Preamplifier Sharing Method
Ahn, Cheol-Min ; Kim, Young-Sik ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 275~283
DOI : 10.7471/ikeee.2013.17.3.275
In this paper, a 8bit 10Ms/s CMOS Folding and Interpolation analog-to-digital convertor is proposed. The architecture of the proposed ADC is based on a Folding & Interpolation using FR(Folding Rate)=8, NFB(Number of Folding Block)=4, IR(Interpolation Rate)=8. The proposed ADC adopts a preamplifier sharing method to decrease the number of preamplifier by half comparing to the conventional ones. This chip has been fabricated with a 0.35[um] CMOS technology. The effective chip area is
and it consumes 20[mA] at 3.3 power supply with 10[MHz] clock. The INL is -0.57, +0.61 [LSB] and DNL is -0.4, +0.51 [LSB]. The SFDR is 48.9[dB] and SNDR is 47.9[dB](ENOB 7.6b) when the input frequency is 100[kHz] at 10[MHz] conversion rate.
Thermoelectric Energy Harvesting Circuit Using DC-DC Boost Converter
Yoon, Eun-Jung ; Park, Jong-Tae ; Yu, Chong-Gun ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 284~293
DOI : 10.7471/ikeee.2013.17.3.284
This paper describes a DC-DC boost converter for thermoelectric energy harvesting. The designed converter boosts the VDD through a start-up block from a low-output voltage of a thermoelectric device and the boosted VDD is used to operate the internal control block. When the VDD reaches a predefined value, a detector circuit makes the start-up block turn off to minimize current consumption. The final boosted VOUT is achieved by alternately operating the DC-DC converter for VDD and the main DC-DC converter for VOUT according to the comparator outputs. Simulation results shows that the designed converter generates 2.65V from an input voltage of 200mV and its maximum power efficiency is 63%. The area of the chip designed using a 0.35um CMOS process is
A Design and Implementation of an Integrated Self-Advertisement System for Farm Produces
Cho, Yongyun ; Park, Sungryong ; Choi, Jongsun ; Choi, Jaeyoung ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 294~300
DOI : 10.7471/ikeee.2013.17.3.294
All countries make an effort to ensure the safety of agricultural products in the food distribution phase. Recently, as the market size of farm produces sales has increased through on-line shopping malls, there are various researches to offer traceable information about farm produces to customers conveniently and correctly. This paper designs and implements an integrated self-advertisement system for farm produces. By offering producer's information and traceable information about farm produces directly through the suggested system, a producer can assure the safeness of the informations and a customer can have trust in the agricultural produces. Especially, because the suggested system does not need a heavy cost or a complicated registration process for producers, it can be used as convenient and safe advertisement means and help small-scale producers a lot in increasing sales profit.
The Hybrid Lighting Control System on Multiple Sensor
Hong, Sung-Il ; Lin, Chi-Ho ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 301~308
DOI : 10.7471/ikeee.2013.17.3.301
In this paper, we propose the hybrid lighting control system on multiple sensor. The proposed hybrid lighting control system was designed for management and control of street lightings by configured as the data display part of integration-interworking part, the data conversion-processing part of integrated management part, and the communication part of gateway system. The data are implemented to designing the DB to enable to storage in real-time by enable to monitoring by wireless remote control and schedule set. As a result of the efficiency verification of the proposed hybrid lighting control system, the hybrid lighting control system be to the real-time monitoring and remote lighting control was possible, because to peristalsis with smart devices and portable PC etc., and it could be obtained the effect of energy and electricity, communication cost reduction.
A Development Tool for Creating and Executing Robot Services
Cho, Yongseong ; Choi, Jongsun ; Choi, Jaeyoung ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 309~316
DOI : 10.7471/ikeee.2013.17.3.309
There are many actively researched works on context-aware workflows for developing intelligent robot services. It is possible to describe not only the definition of robot services but also the contextual information of user's surroundings which can be used as the transition conditions for executing those robot services. Therefore it is required to prepare a context-aware workflow document to support the intelligent robot services. In this paper, we propose a development tool which enables robot service developers to describe context-aware workflow documents and execute them. The tool users can write robot service workflows easily by using intuitive GUI of the tool. In the experiment, we showed processes of writing robot service workflows in scenario format, then automatically documenting and executing them.
Implementation of 1.7MHz, 25W Wireless Power Transmission(WPT) System using Coupled Magnetic Resonance
Kim, Seong-Min ; Cho, In-Gui ; Moon, Jung-Ick ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 317~323
DOI : 10.7471/ikeee.2013.17.3.317
In this paper, 25W wireless power transmission(WPT) system using the coupled magnetic resonance is presented. The WPT system consists of a 100W class-F power transmitter, 1.7MHz magnetic resonators and a 40W full-bridge receiver using diodes. Especially, the transmit power control function using the 400MHz FSK communication between the transmitter and the receiver is adopted in the proposed system for the stable power transmission. Using the system and the power control function, the WPT system can be adopted in the various electronic devices and the commercialization of WPT system can be moved forward.
Practical Implementation of Memristor Emulator Circuit on Printed Circuit Board
Choi, Jun-Myung ; Sin, SangHak ; Min, Kyeong-Sik ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 324~331
DOI : 10.7471/ikeee.2013.17.3.324
In this paper, we implemented memristor emulator circuit on Printed Circuit Board (PCB) and observed the inherent pinched hysteresis characteristic of memristors by measuring the emulator circuit on PCB. The memristor emulator circuit implemented on PCB is composed of simple discrete devices not using any complicated circuit blocks thus we can integrate the memristor emulator circuits in very small layout area on Silicon substrate. The programmable gain amplifier is designed using the proposed memristor emulator circuit and verified that the amplifier's voltage gain can be controlled by programming memristance of the emulator circuit by circuit simulation. Threshold switching is also realized in the proposed emulator circuit thus memristance can remain unchanged when the input voltage applied to the emulator circuit is lower than VREF. The memristor emulator circuit and the programmable gain amplifier using the proposed circuit can be useful in teaching the device operation, functions, characteristics, and applications of memristors to students when thet cannot access to device and fabrication technologies of real memristors.
Design and Implementation of Rule-based BPEL System for BPEL Rule Modeling
Kwak, Donggyu ; Choi, Jaeyoung ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 332~338
DOI : 10.7471/ikeee.2013.17.3.332
BPEL is a standard executable language for specifying actions within business processes with Web services. BPEL workflow requires rule engine to describe application process in BPEL, as the requirements increase. It is needed to develop new BPEL's engine or modify BPEL's engine in order to add the functionality of rules to BPEL engines, but this method is not easy to implement and it requires very high cost. In this paper, we present an R4BPEL document, which uses the original BPEL grammar and includes a rule document. With this method, it is possible to build rule-based BPEL environment easily by adding web services with rules and R4BPEL document analyzer to the general-purpose Web services. In this paper, we campared a BPEL's document in proposed system with a BPEL's document in the existing system. And we demonstrated the simplicity of the rule-based system.
Probabilistic Exclusion Based Orthogonal Matching Pursuit Algorithm for Sparse Signal Reconstruction
Kim, Seehyun ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 339~345
DOI : 10.7471/ikeee.2013.17.3.339
In this paper, the probabilistic exclusion based orthogonal matching pursuit (PEOMP) algorithm for the sparse signal reconstruction is proposed. Some of recent greedy algorithms such as CoSaMP, gOMP, BAOMP improved the reconstruction performance by deleting unsuitable atoms at each iteration. They still often fail to converge to the solution because the support set could not escape from a local minimum. PEOMP helps to escape by excluding a random atom in the support set according to a well-chosen probability function. Experimental results show that PEOMP outperforms several OMP based algorithms and the
optimization method in terms of exact reconstruction probability.
Algebraic Accuracy Verification for Division-by-Convergence based 24-bit Floating-point Divider Complying with OpenGL
Yoo, Sehoon ; Lee, Jungwoo ; Kim, Kichul ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 346~351
DOI : 10.7471/ikeee.2013.17.3.346
Low-cost and low-power are important requirements in mobile systems. Thus, when a floating-point arithmetic unit is needed, 24-bit floating-point format can be more useful than 32-bit floating-point format. However, a 24-bit floating-point arithmetic unit can be risky because it usually has lower accuracy than a 32-bit floating-point arithmetic unit. Consecutive floating-point operations are performed in 3D graphic processors. In this case, the verification of the floating-point operation accuracy is important. Among 3D graphic arithmetic operations, the floating-point division is one of the most difficult operations to satisfy the accuracy of
which is the required accuracy in OpenGL ES 3.0. No 24-bit floating-point divider, whose accuracy is algebraically verified, has been reported. In this paper, a 24-bit floating-point divider is analyzed and it is algebraically verified that its accuracy satisfies the OpenGL requirement.
Design of Low Cost H.264/AVC Entropy Coding Unit Using Code Table Pattern Analysis
Song, Sehyun ; Kim, Kichul ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 352~359
DOI : 10.7471/ikeee.2013.17.3.352
This paper proposes an entropy coding unit for H.264/AVC baseline profile. Entropy coding requires code tables for macroblock encoding. There are patterns in codewords of each code tables. In this paper, the patterns between codewords are analyzed to reduce the hardware cost. The entropy coding unit consists of Exp-Golomb unit and CAVLC unit. The Exp-Golomb unit can process five code types in a single unit. It can perform Exp-Golomb processing using only two adders. While typical CAVLC units use various code tables which require large amounts of resources, the sizes of the tables are reduced to about 40% or less of typical CAVLC units using relationships between table elements in the proposed CAVLC unit. After the Exp-Golomb unit and the CAVLC unit generate code values, the entropy unit uses a small size shifter for bit-stream generation while typical methods are barrel shifters.
The Electrical Characteristics of Power FET using Super Junction for Advance Power Modules
Kang, Ey Goo ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 360~364
DOI : 10.7471/ikeee.2013.17.3.360
The maximum breakdown voltage's characteristic within the Super Junction MOSFET structure comes from N-Drift and P-Pillar's charge balance. By developing P-Pillar from Planar MOSFET, it was confirmed that the breakdown voltage is improved through charge balance, and by setting the gate voltage at 10V, the characteristic comparisons of Planar MOSFET and Super Junction MOSFET are shown in picture 6. The results show that it had the same breakdown voltage as Planar MOSFET which increased temperature resistance by 87.4% at
which shows that by the temperature resistance increasing, the power module's power dissipation improved.
A Study on Electrical Characteristics and Optimization of Trench Power MOSFET for Industrial Motor Drive
Kang, Ey Goo ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 365~370
DOI : 10.7471/ikeee.2013.17.3.365
Power MOSFET is developed in power savings, high efficiency, small size, high reliability, fast switching, and low noise. Power MOSFET can be used in high-speed switching transistors devices. Recently attention given to the motor and the application of various technologies. Power MOSFET is a voltage-driven approach switching device and designed to handle on large power, power supplies, converters, motor controllers. In this paper, the 400 V Planar type, and the trench type for realization of low on-resistance are designed. Trench Gate Power MOSFET Vth : 3.25 V BV : 484 V Ron : 0.0395 Ohm has been optimized.
Implementation of augmented reality using parallel structure
Park, Tae-Ryong ; Heo, Hoon ; Kwak, Jae-Chang ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 371~377
DOI : 10.7471/ikeee.2013.17.3.371
This thesis propose an efficient parallel structure method for implementing a FAST and BRIEF algorithm based Augmented Reality. SURF algorithm that is well known in the object recognition algorithms is robust in object recognition. However, there is a disadvantage for real time operation because, SURF implementation requires a lot of computation. Therefore, we used a FAST and BRIEF algorithm for object recognition, and we improved Conventional Parallel Structure based on OpenMP Library. As a result, it achieves a 70%~100% improvement in execution time on the embedded system.
The Design of SCR-based Whole-Chip ESD Protection with Dual-Direction and High Holding Voltage
Song, Bo-Bae ; Han, Jung-Woo ; Nam, Jong-Ho ; Choi, Yong-Nam ; Koo, Yong-Seo ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 378~384
DOI : 10.7471/ikeee.2013.17.3.378
We have investigated the electrical characteristics of SCR(Silicon Controlled Rectifier)-based ESD power clamp circuit with high holding voltage and dual-directional ESD protection cells for a whole-chip ESD protection. The measurement results indicate that the dimension of n/p-well and p-drift has a great effect on holding voltage (2V-5V). Also A dual-directional ESD protection circuit is designed for I/O ESD protection application. The trigger voltage and the holding voltage are measured to 5V and 3V respectively. In comparison with typical ESD protection schemes for whole-chip ESD protection, this ESD protection device can provide an effective protection for ICs against ESD pulses in the two opposite directions, so this design scheme for whole-chip ESD protection can be discharged in ESD-stress mode (PD, ND, PS, NS) as well as VDD-VSS mode. Finally, a whole-chip ESD protection can be applied to 2.5~3.3V VDD applications. The robustness of the novel ESD protection cells are measured to HBM 8kV and MM 400V.
Tx/Rx Isolation enhancement of the Planar Patch Antenna at 5.8GHz ISM band
Yun, Gi-Ho ;
Journal of IKEEE, volume 17, issue 3, 2013, Pages 385~392
DOI : 10.7471/ikeee.2013.17.3.385
In this paper, microstrip antenna to enhance the isolation between transmitting port and receiving port under the proximity objects is proposed, and applied to the Doppler radar sensor working at 5.8GHz ISM band which detects vital signals of a human body. Two 3dB quadrature hybrids are placed around radiation patch to form a balanced structure between transmitting port and receiving port, such that it consistently provides enhanced Tx/Rx isolation and excellent return loss over nearby objects. It is theoretically analyzed and simulated to verify the validity of the proposed application. The fabricated antenna that is 2mm away from the human body, has more than 16 dB return loss and at least 30dB isolation over ISM frequency band of 5.8GHz.