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REFERENCE LINKING PLATFORM OF KOREA S&T JOURNALS
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Journal of IKEEE
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Journal DOI :
Institude of Korean Electrical and Electronics Engineers
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Volume & Issues
Volume 19, Issue 4 - Dec 2015
Volume 19, Issue 3 - Sep 2015
Volume 19, Issue 2 - Jun 2015
Volume 19, Issue 1 - Mar 2015
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Fabrication of Fiber-optics Detector for Measuring Radioactive Waste
Kim, Jeong-Ho ; Joo, Koan-Sik ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 282~287
DOI : 10.7471/ikeee.2015.19.3.282
In this study, an optical fiber detector was constructed by using a Ce:GAGG scintillator, optical fiber, and photomultiplier. The single crystal size of the scintillator was set to
after simulating the counting efficiency of gamma rays in the scintillator by using the MCNPX code. The constructed detector used the standard gamma ray sources
to measure radiation and analyze the spectral characteristics of gamma rays. The resulting trend curve showed excellent linearity with an R-squared value of 0.99741, and the detector characteristics were found to vary 2% or less with distance based on comparison with the MCNPX value. Furthermore, the spectroscopic analysis of the gamma ray energy from the single-ray and mixed-ray sources showed that
had its peak energy at 662 keV, and
had at 356 keV. It seems that if the fiber-optics detector is used, working hours and exposure of worker can be reduced.
Low-Cost CRC Scheme by Using DBI(Data Bus Inversion) for High Speed Semiconductor Memory
Lee, Joong-Ho ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 288~294
DOI : 10.7471/ikeee.2015.19.3.288
CRC function has been built into the high-speed semiconductor memory device in order to increase the reliability of data for high-speed operation. Also, DBI function is adopted to improve of data transmission speed. Conventional CRC(ATM-8 HEC code) method has a significant amounts of area-overhead(~XOR 700 gates), and processing time(6 stage XOR) is large. Therefore it leads to a considerable burden on the timing margin at the time of reading and writing of the low power memory devices for CRC calculations. In this paper, we propose a CRC method for low cost and high speed memory, which was improved 92% for area-overhead. For low-cost implementation of the CRC scheme by the DBI function it was supplemented by data bit error detection rate. And analyzing the error detection rate were compared with conventional CRC method.
Energy Storage System Model for Facility Plan Connected with Solar and Wind Power Plant
Lee, Yong-Bong ; Kim, Jeong-Ho ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 295~303
DOI : 10.7471/ikeee.2015.19.3.295
Considering to Energy Storage System (ESS) is a global trend In order to reduce global warming and carbon emissions. South Korea has announced various policies to vitalize the development and uptake of renewable energy. South Korea is planning the cumulative capacity of ESS of two million kW in 2020. According to the government support and development of technology companies, the battery of ESS prices are expected to fall gradually. In this paper, we develop a planning model that take into account the supply expansion of technology of ESS and prices. Based on planning model, we analyze the cost of ESS linked with wind power and the revenue for trading electricity and renewable energy certifications.
Implementation of a High Efficiency SCALDO Regulator Using MOSFET
Kwon, O-Soon ; Son, Joon-Bae ; Kim, Tea-Rim ; Song, Jong-Gyu ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 304~310
DOI : 10.7471/ikeee.2015.19.3.304
A SCALDO(Supercapacitor Assisted LDO) regulator is a new regulator having advantages of a SMPS(Switch Mode Power Supply) which has a good efficiency and a LDO(Low Drop-out) regulator which has stable output characteristics and good EMI(Electro Magnetic Interference) characteristics. However, a conventional SCALDO regulator needs a lot of power consumption to control its switches and it drops an efficiency of the circuit. In this paper, to reduce switching power consumption and improve an efficiency of the circuit, a new SCALDO regulator adopting MOSFETs as its switching parts is proposed and it is found out that the proposed SCALDO regulator has the maximum 9.5% higher efficiency than the conventional SCALDO regulator. We also try to simplify production process of the circuit by changing switching control method of the circuit from MCU(Micro-controller unit) based firmware control to hardware control using a comparator and a T-F/F(Flip Flop).
A Study on Development of Voice and SMS Alarm System Based on MODBUS Protocol
Seol, Jun-Soo ; Lee, Seung-Ho ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 311~318
DOI : 10.7471/ikeee.2015.19.3.311
This dissertation proposes method for development technology of voice and SMS(Short Message Service) alarming system based on modbus protocol. The proposed technology is composed of the following 3 stages; hardware development based on microprocessor, development of input and output driver for modem, mp3 decoder, making modbus protocol stack. In the stage of hardware development based on microprocessor, we develop hardware which receives alarm from modbus master and transmit sms message, play mp3. In the stage of development of input / ouput device driver such as modem, mp3 decoder, we develop program which control each devices. In the stage of making modbus protocol stack, voice and sms alarm system is made for receiving alarm via modbus protocol. To evaluate performance of proposed technology, we issued alarm to voice and sms alarming system on purpose. As a result, response speed of detecting alarm was 10.7ms, communication distance was 1.2Km, operating temperature was from
, we confirmed supporting modbus protocol. And we verified that proposed voice and sms alarming system in the thesis has a performance to be used as an industrial building alarming system.
A Study on Development of Conversion Software for Controller Without OPC Stack to Communicate With OPC DA Client
Lee, Yong-Min ; Lee, Seung-Ho ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 319~326
DOI : 10.7471/ikeee.2015.19.3.319
This paper proposes method about development of conversion software for controller without OPC stack to communicate with OPC DA client. The proposed method is composed of development of OPC server based on OPC DA standard protocol, development of GUI application can be checked the OPC tag and point informations, development of conversion module to convert from OPC protocol to open standard protocol. In the stage of development of OPC server based on OPC DA standard protocol, we develope server in the pc to transmit and receive datum through OPC DA protocol with OPC DA client. In the stage of evelopment of GUI application can be checked the OPC tag and point informations, run the OPC DA server and register to window system registry and check OPC tags, points, transmitting and receiving of data from serial communication. In the stage of development of conversion module to convert from OPC protocol to open standard protocol, convert from OPC tag data which has received from OPC DA client to protocol can be communicated with industrial controller using open standard protocol so that support to transmit and receive data. To evaluate the efficiency of the proposed software, we connected OPC DA server software and OPC client, and 5 sample industrial controller which use open standard protocol, as a result we got 96.98% average communication succeeding rate among entire transmitting and receiving packets. We also confirmed that successfully communicated between industrial building controller which uses modbus protocol and industrial OPC DA client using OPC DA conversion software proposed by this dissertation.
Design and Implementation of Publish/Subscribe Model Based RPC Middleware
Park, Sanghyun ; Choi, Junesung ; Kook, Kwangho ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 327~334
DOI : 10.7471/ikeee.2015.19.3.327
Various types of middle-ware were created for integration between legacy systems and newly built systems. RPC(Remote Procedure Call), MOM(Message Oriented Middle-ware) and TM(Transaction processing Monitor) are the typical types of middle-ware. One of the most known MOM type middle-ware is PS(Publish/Subscribe). PS enables to create a system which has low coupling and high scalability. But PS based systems also have low cohesiveness. On the contrary, RPC has high cohesiveness but also has high coupling. This paper proposed design and implementation of hybrid model which offset disadvantages of RPC and PS.
An Implementation of High-precision Three-phase Linear Absolute Position Sensor
Lee, Chang Su ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 335~341
DOI : 10.7471/ikeee.2015.19.3.335
Recently a demand for high precision absolute position transducer is increasing in order to control thickness in steel industry. LVDT (linear variable differential transformer) is widely used to measure the absolute position in the linearly moving cylinder under poor factory environment. In this paper we implement the three phase LVDT with a high resolution of one micron and L/D (LVDT to digital) converter. First we designed U, V, and W three phase signaling using FPGA. Second a pulse output algorithm is designed for position information with A and B phase waveforms. Finally the performance is compared with previous sensors. Experiments show that the linearity deviation error is 0.009788 [mm] and the average sinusoidal THD is 0.0751%, which means 2.2% and 33% more improved result than the previous sensors respectively.
Design of FIR Filters With Sparse Signed Digit Coefficients
Kim, Seehyun ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 342~348
DOI : 10.7471/ikeee.2015.19.3.342
High speed implementation of digital filters is required in high data rate applications such as hard-wired wide band modem and high resolution video codec. Since the critical path of the digital filter is the MAC (multiplication and accumulation) circuit, the filter coefficient with sparse non-zero bits enables high speed implementation with adders of low hardware cost. Compressive sensing has been reported to be very successful in sparse representation and sparse signal recovery. In this paper a filter design method for digital FIR filters with CSD (canonic signed digit) coefficients using compressive sensing technique is proposed. The sparse non-zero signed bits are selected in the greedy fashion while pruning the mistakenly selected digits. A few design examples show that the proposed method can be utilized for designing sparse CSD coefficient digital FIR filters approximating the desired frequency response.
Improvement Method for Message Processing Speed of ADC2A System
Lee, Jeong-min ; Lim, Won-gi ; Park, Seung-jin ; Choi, June-sung ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 349~356
DOI : 10.7471/ikeee.2015.19.3.349
Air Defense Command Control and Alert(ADC2A) system is a system that ensures simultaneity and integrity of air defense operations by combining sensors, weapons and Command and Control(C2) systems over a tactical network to protect forces, facilities and strategic points from enemy`s air attack. Improving message processing speed is a very important factor for ADC2A, because it uses high frequency bit-processing of the Army standard KVMF message to communicate with internal and external systems. In this paper we proposed improved method of KVMF message processing for ADC2A system.
Design Technique and Application for Distributed Recovery Block Using the Partitioning Operating System Based on Multi-Core System
Park, Hansol ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 357~365
DOI : 10.7471/ikeee.2015.19.3.357
Recently, embedded systems such as aircraft and automobilie, are developed as modular architecture instead of federated architecture because of SWaP(Size, Weight and Power) issues. In addition, partition operating system that support multiple logical node based on partition concept were recently appeared. Distributed recovery block is fault tolerance design scheme that applicable to mission critical real-time system to support real-time take over via real-time synchronization between participated nodes. Because of real-time synchronization, single-core based computer is not suitable for partition based distributed recovery block design scheme. Multi-core and AMP(Asymmetric Multi-Processing) based partition architecture is required to apply distributed recovery block design scheme. In this paper, we proposed design scheme of distributed recovery block on the multi-core based supervised-AMP architecture partition operating system. This paper implements flight control simulator for avionics to check feasibility of our design scheme.
Alternating Battery Discharge Method Using Discharge Time Balancing
Lee, Jong-Bae ; Lee, Seongsoo ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 366~370
DOI : 10.7471/ikeee.2015.19.3.366
This paper proposes an alternating battery discharge method by balancing discharge time of battery cells, which significantly increases battery lifetime. In the conventional method, several battery cells are alternately discharged to make battery recovery effect, and this increases battery lifetime. In this case, there are some overlap intervals where several battery cells are ON to avoid system power cut-off, but this makes several problems due to the voltage differences of battery cells. To mitigate these problems, discharge time of battery cells are controlled to make battery cell voltages as equal as possible. Measurements show that the battery lifetime is exxtended by 19.2% in the proposed method.
RF Transceiver Design and Implementation for Common Data Link
Kim, Joo-Yeon ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 371~377
DOI : 10.7471/ikeee.2015.19.3.371
This paper is about the RF transceiver designed and implementation for common data link. The trasmitter is configured as a frequency up-converter, a power amplifier and a duplexer. The receiver is configured as a duplxer, a frequency down-converter and a low noise amplifier. The maximum transmission distance, the reception sensitivity is designed to meet the electrical and temperature characteristics and the like. Using a modeling and simulation in order to meet the requirements of the RF transceiver has been designed and implemented. Transmitting output power and Noise Figure has been measured with 38.58dBm and 5.5dB, respectively. All of the electrical and temperature specifications was meet. Was confirmed all of the requirement specification by electrical characteristics test and temperature characteristics test.
16×16 HEVC Inverse Core Transform Architecture Using Multiplier Reuse
Lee, Jong-Bae ; Lee, Seongsoo ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 378~384
DOI : 10.7471/ikeee.2015.19.3.378
In conventional HEVC inverse core transform architectures, extra
inverse transform block is added to
inverse transform block, and it operates as one
inverse transform block or two
inverse transform blocks. Thus, same number of pixels are processed in the same time, but it suffers from increased hardware size due to extra
inverse transform block. To avoid this problem, a novel
HEVC inverse core transform architecture was proposed to eliminate extra
inverse transform block based on multiplier reuse. This paper extends this approach and proposes a novel HEVC
inverse core transform architecture. Its frame processing time is same in
inverse core transforms, and reduces gate counts by 13%.
A Packet Collision Avoidance Technique in IEEE1609.4 Based Time Synchronization Multi-channel Environment
Jin, Seong-Keun ; Lim, Ki-Taeg ; Shin, Dae-Kyo ; Yoon, Sang-Hun ; Jung, Han-Gyun ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 385~391
DOI : 10.7471/ikeee.2015.19.3.385
In this paper, we analyze the communication performance in a time synchronous multi-channel environment and deal with a packet collision avoidance technique to improve it based on IEEE1609.4 for increasing the efficiency of the control channel IEEE802.11p WAVE communication system. In previous works, they tried to solve this problem by message scheduling method on application layer software or changing the value of the random back-off optionally Contention Window. In this paper, we propose a method for adjusting the Channel Guard Interval for packet collision avoidance. The performance was evaluated by the actual vehicle test. The result was confirmed performance over 90% PDR(Packet Delivery Ratio).
Design of Unified HEVC/VP9 4×4 Transform Block
Jung, Seulkee ; Lee, Seongsoo ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 392~399
DOI : 10.7471/ikeee.2015.19.3.392
This paper proposes a unified
transform architecture for HEVC and VP9 codec to reduce hardware size. It performs HEVC
IDCT, and VP9
IADST in a unified hardware. HEVC
IDCT and VP9
IDCT have same IDCT computation except for the scales of coefficients. Similarly, HEVC
IDST and VP9
IADST have same IDST computation except for the scales of coefficients. Furthermore, IDCT and IDST have quite a lot of similarity, so they can share some hardwares in common. So the proposed hardware performs all 4 operations in a unified hardware, where each operation has its own multiplication coefficients with shared butterfly adders. The synthesized block in 0.18 um technology is 6,679 gates, and the gate count is reduced by 25.3% in comparison with conventional designs.
Decision Feedback Based Diversity Modem for IEEE802.11p WAVE
Yoon, Sang-Hun ; Jin, Seong-Keun ; Shin, Dae-Kyo ; Lim, Ki-Taeg ; Jung, Han-Gyun ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 400~406
DOI : 10.7471/ikeee.2015.19.3.400
In this paper, we designed a decision feedback based diversity modem hardware architecture for IEEE802.11p WAVE and tested the modem on the road with car attached shark antenna. One of the dual channel modem and the diversity single modem with maximum ratio combining algorithm can be selected on the designed architecture. The designed modem have been implemented on the Xillinx Kintex7 FPGA. We tested the modem performance on the smart highway experience road. As experimental results, we can verify the performance of the diversity modem on real road and the enlarged communication range by more than 100%.
Performance Analysis of Various Forward Solvers in Electrical Impedance Tomography
Kim, Bong Seok ; Kim, Kyung Youn ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 407~414
DOI : 10.7471/ikeee.2015.19.3.407
Electrical impedance tomography is an imaging technique to reconstruct the internal conductivity distribution based on applied small currents and measured voltages through an array of electrodes attached on the boundary of a domain of interest. In this paper, an analytical solver with complete electrode model is derived and the analytical voltage data are calculated. Moreover, the voltage data are also computed with existing numerical solvers such as finite element method and boundary element method. The forward solutions using homogeneous and inhomogeneous conditions are compared with phantom experiments through the root mean square errors.
A Study on Applying The DO-178C to The Control SW Development of The Military Aircraft Intercom Based on CMMI
Yoon, In-Bok ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 415~423
DOI : 10.7471/ikeee.2015.19.3.415
The DO-178C guide, which is referenced as the software development guide when a certification of the airworthiness in the commercial airplane is acquired by FAA in US, is recently referenced for the local military aircraft airworthiness. This indicates that when the auditor of the military aircraft airworthiness looks over the software development documents, the auditor reviews if all of the documents are verified in accordance with the DO-178C guide. However, when we developed the military aircraft intercom, We developed its control software in accordance with the CMMI level 3, since there were no requirements for the compliance of the DO-178C guide. Therefore, When we consider the airworthiness of this intercomm system, The analysis for how much the software development based on the CMMI level 3 is different from the DO-178C guide is needed to prepare the essential software documents additionally. Thus, This study analyzes the differences between CMMI level 3 and DO-178C guide and provides that which data on the CMMI level 3 is necessary for the compliance of the aircraft airworthiness comparing with the DO-178C. The analyzed result can be applied at the software development of the other military aircraft avionics equipment based on the CMMI model environment considering the compliance of the military aircraft airworthiness.
Application to 2-D Page-oriented Data Optical Cryptography Based on CFB Mode
Gil, Sang-Keun ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 424~430
DOI : 10.7471/ikeee.2015.19.3.424
This paper proposes an optical cryptography application to 2-D page-oriented data based on CFB(Cipher Feedback) mode algorithm. The proposed method uses a free-space optical interconnected dual-encoding technique which performs XOR logic operations in order to implement 2-D page-oriented data encryption. The proposed method provides more enhanced cryptosystem with greater security strength than the conventional CFB block mode with 1-D encryption key due to the huge encryption key with 2-D arrayed page type. To verify the proposed method, encryption and decryption of 2-D page data and error analysis are carried out by computer simulations. The results show that the proposed CFB optical encryption system makes it possible to implement stronger cryptosystem with massive data processing and long encryption key compared to 1-D block method.
A Case Study on Reliability Test of Embedded Software in the Multi-Function Radar
Kim, Jong-Woo ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 431~439
DOI : 10.7471/ikeee.2015.19.3.431
This paper introduces analysis technique and test procedure for verifying the reliability of the multi-function radar software. Also the process of software development and reliability test method for reducing the development period are described. Test results show that the verified software has reduced errors and improved reliability compared to the unverified software.
The Susceptibility of LNA(Low Noise Amplifier) Due To Front-Door Coupling Under Narrow-Band High Power Electromagnetic Wave
Hwang, Sun-Mook ; Huh, Chang-Su ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 440~446
DOI : 10.7471/ikeee.2015.19.3.440
This study has examined susceptibility of LNA(Low Noise Amplifier) due to Front-Door Coupling under Narrow-Band high power electromagnetic wave. M/DFR(Malfunction/Destruction Failure Rate) was measured to investigate the diagnostic of IC test. In addition, decapsulation analysis was used to understand the inside of the chip state in LNA devices. The experiments is employed as an open-ended waveguide to study the destruction effects of LNA using a 2.45 GHz Magnetron as a high power electromagnetic wave. The susceptibility level of LNA was assessed by electric field strength, and its failure modes were observed. The malfunction of LNA device has showed as the type of self-reset and power-reset. The electric field strength of malfunction threshold is 524 V/m and 1150 V/m respectively. Also, he electric field of destruction threshold is 1530 V/m. Three types of damaged LNA were observed by decapsulation analysis: component, onchipwire, and bondwire destruction. Based on these results, the susceptibility of the LNA can be applied to a database to help elucidate the effects of microwaves on electronic equipment.
Complexity Analysis for Implementation of the PM-store of ISO/IEEE 11073 PHD Standards
Kim, Sang-kon ; Lee, Chang-ki ; Kim, Tae-kon ; Hwang, Hee-joung ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 447~454
DOI : 10.7471/ikeee.2015.19.3.447
In this paper, the complexity analysis for implementation of the PM-store is performed in terms of the number of instruction cycles which is executed by CPU in a personal health device(PHD) in order to transfer the large amount of the periodically generated measurement data using the PM-store concept defined in ISO/IEEE 11073 PHD standards. We propose an analytic model that is focused on the number of instruction cycles executed by CPU depending on the PM-store hierarchy.
Design of a Dispatch Unit & Operand Selection Unit for Improving the SIMT Based GP-GPU Instruction Performance
Kwak, Jae Chang ;
Journal of IKEEE, volume 19, issue 3, 2015, Pages 455~459
DOI : 10.7471/ikeee.2015.19.3.455
This paper proposes a dispatch unit of GP-GPU with SIMT architecture to support the acceleration of general-purpose operation as well as graphics processing. If all the information of an operand used instructions issued from the warp scheduler is decoded, an unnecessary operand load occurs, resulting in register loads. To resolve this problem, this paper proposes a method that can reduce the operand load and the load on the resister by decoding only the information of the operand using a pre-decoding method. The operand information from the dispatch unit is passed to the operand selection unit with preventing register bank collisions. Thus the overall performance are improved. In the simulation test, the total clock cycles required by processing 10,000 arbitrary instructions issued from the wrap scheduler using ModelSim SE 10.0b are measured. It shows that the application of the dispatch unit equipped with the pre-decoding function proposed in this paper can make an improvement of about 12% in processing performance compared to the conventional method.