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REFERENCE LINKING PLATFORM OF KOREA S&T JOURNALS
> Journal Vol & Issue
Journal of the Microelectronics and Packaging Society
Journal Basic Information
Journal DOI :
The Korean Microelectronics and Packaging Society
Editor in Chief :
Volume & Issues
Volume 19, Issue 4 - Dec 2012
Volume 19, Issue 3 - Sep 2012
Volume 19, Issue 2 - Jun 2012
Volume 19, Issue 1 - Mar 2012
Selecting the target year
Introduction of Reliability Test Technology for Electronics Package
Tanaka, Hirokazu ; Kim, Keun-Soo ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 1, 2012, Pages 1~7
DOI : 10.6117/kmeps.2012.19.1.001
Reliability technology has been expected to grow rapidly for new types of electronic equipments. We have selected several reliability issues in electronic package to be reviewed. This paper will provide a view of the current state of technological progress in reliability of electronic package in Japan, and will discuss future prospects for the technology.
Review of Technology Development of High Heat Dissipative Insulating Sheet
Yoo, Myong-Jae ; Park, Seong-Dae ; Lim, Ho-Sun ; Lee, Woo-Sung ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 1, 2012, Pages 9~16
DOI : 10.6117/kmeps.2012.19.1.009
Currently due to increasing integration of various electronic devices and need of multi-functions, more and more heat is produced and for electronic devices to achieve maximum performance with optimum life time, heat dissipation is critical. A solution to such problems is use of high heat dissipative insulating sheet. In this paper status of current products are introduced and several technology aspects to meet the demand of increased heat dissipation needs is introduced.
Low Temperature bonding Technology for Electronic Packaging
Kim, Sun-Chul ; Kim, Youngh-Ho ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 1, 2012, Pages 17~24
DOI : 10.6117/kmeps.2012.19.1.017
Recently, flip chip interconnection has been increasingly used in microelectronic assemblies. The common Flip chip interconnection is formed by reflow of the solder bumps. Lead-Tin solders and Tin-based solders are most widely used for the solder bump materials. However, the flip chip interconnection using these solder materials cannot be applied to temperature-sensitive components since solder reflow is performed at relatively high temperature. Therefore the development of low temperature bonding technologies is required in these applications. A few bonding techniques at low temperature of
or below have been reported. They include the reflow soldering using low melting point solder bumps, the transient liquid phase bonding by inter-diffusion between two solders, and the bonding using low temperature curable adhesive. This paper reviews various low temperature bonding methods.
3D SDRAM Package Technology for a Satellite
Lim, Jae-Sung ; Kim, Jin-Ho ; Kim, Hyun-Ju ; Jung, Jin-Wook ; Lee, Hyouk ; Park, Mi-Young ; Chae, Jang-Soo ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 1, 2012, Pages 25~32
DOI : 10.6117/kmeps.2012.19.1.025
Package for artificial satellite is to produce mass production for high package with reliability certification as well as develop SDRAM (synchronous dynamic RAM) module which has such as miniaturization, mass storage, and high reliability in space environment. It requires sophisticated technology with chip stacking or package stacking in order to increase up to 4Gbits or more for mass storage with space technology. To make it better, we should secure suitable processes by doing design, manufacture, and debugging. Pin type PCB substrate was then applied to QFP-Pin type 3D memory package fabrication. These results show that the 3D memory package for artificial satellite scheme is a promising candidate for the realization of our own domestic technologies.
Fabrication Process and Sensing Characteristics of the In-plane Thermoelectric Sensor Consisting of the Evaporated p-type Sb-Te and n-type Bi-Te Thin Films
Bae, Jae-Man ; Kim, Min-Young ; Oh, Tae-Sung ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 1, 2012, Pages 33~38
DOI : 10.6117/kmeps.2012.19.1.033
An in-plane thermoelectric sensor was processed on a glass substrate by evaporation of the n-type Bi-Te and p-type Sb-Te thin films, and its sensing characteristics were evaluated. The n-type Bi-Te thins film used to fabricate the inplane sensor exhibited a Seebeck coefficient of -165
/K and a power factor of
. The p-type Sb-Te thin film used to fabricate the in-plane sensor exhibited a Seebeck coefficient of 142
/K and a power factor of
. The in-plane thermoelectric sensor consisting of 15 pairs of the n-type Bi-Te and the p-type Sb-Te evaporated thin films exhibited a sensitivity of 2.8 mV/K.
Wet Etching Characteristics of Cu Surface for Cu-Cu Pattern Direct Bonds
Park, Jong-Myeong ; Kim, Yeong-Rae ; Kim, Sung-Dong ; Kim, Jae-Won ; Park, Young-Bae ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 1, 2012, Pages 39~45
DOI : 10.6117/kmeps.2012.19.1.039
Three-dimensional integrated circuit(3D IC) technology has become increasingly important due to the demand for high system performance and functionality. In this work, BOE and HF wet etching of Cu line surfaces after CMP were conducted for Cu-Cu pattern direct bonding. Step height of Cu and
as well as Cu dishing after Cu CMP were analyzed by the 3D-Profiler. Step height increased and Cu dishing decreased with increasing BOE and HF wet etching times. XPS analysis of Cu surface revealed that Cu surface oxide layer was partially removed by BOE and HF wet etching treatment. BOE treatment showed not only the effective
etching but also reduced dishing and Cu surface oxide rather than HF treatment, which can be used as an meaningful process data for reliable Cu-Cu pattern bonding characteristics.
Bonding Strength of Cu/SnAgCu Joint Measured with Thermal Degradation of OSP Surface Finish
Hong, Won-Sik ; Jung, Jae-Seong ; Oh, Chul-Min ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 1, 2012, Pages 47~53
DOI : 10.6117/kmeps.2012.19.1.047
Bonding strength of Sn-3.0Ag-0.5Cu solder joint due to degradation characteristic of OSP surface finish was investigated, compared with SnPb finish. The thickness variation and degradation mechanism of organic solderability preservative(OSP) coating were also analyzed with the number of reflow process. To analyze the degradation degree of solder joint strength, FR-4 PCB coated with OSP and SnPb were experienced preheat treatment as a function of reflow number from 1st to 6th pass, respectively. After 2012 chip resistors were soldered with Sn-3.0Ag-0.5Cu on the pre-heated PCB, the shear strength of solder joints was measured. The thickness of OSP increased with increase of the number of reflow pass by thermal degradation during the reflow process. It was also observed that the preservation effect of OSP decreased due to OSP degradation which led Cu pad oxidation. The mean shear strength of solder joints formed on the Cu pads finished with OSP and SnPb were 58.1 N and 62.2 N, respectively, through the pre-heating of 6 times. Although OSP was degraded with reflow process, the feasibility of its application was proven.
Interfacial Adhesion Energy of Ni-P Electroless-plating Contact for Buried Contact Silicon Solar Cell using 4-point Bending Test System
Kim, Jeong-Kyu ; Lee, Eun-Kyung ; Kim, Mi-Sung ; Lim, Jae-Hong ; Lee, Kyu-Hwan ; Park, Young-Bae ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 1, 2012, Pages 55~60
DOI : 10.6117/kmeps.2012.19.1.055
In order to develop electroless-plated Nickel Phosphate (Ni-P) as a contact material for high efficient low-cost silicon solar cells, we evaluated the effect of ambient thermal annealing on the degradation behavior of interfacial adhesion energy between electroless-plated Ni-P and silicon solar cell wafers by applying 4-point bending test method. Measured interfacial adhesion energies decreased from 14.83 to 10.83 J/
after annealing at 300 and
, respectively. The X-ray photoelectron spectroscopy analysis suggested that the bonding interface was degraded by environmental residual oxygen, in which the oxidation inhibit the stable formation of Ni silicide phase between electroless-plated Ni-P and silicon interface.
Electrochemical Characterization of Anti-Corrosion Film Coated Metal Conditioner Surfaces for Tungsten CMP Applications
Cho, Byoung-Jun ; Kwon, Tae-Young ; Kim, Hyuk-Min ; Venkatesh, Prasanna ; Park, Moon-Seok ; Park, Jin-Goo ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 1, 2012, Pages 61~66
DOI : 10.6117/kmeps.2012.19.1.061
Chemical Mechanical Planarization (CMP) is a polishing process used in the microelectronic fabrication industries to achieve a globally planar wafer surface for the manufacturing of integrated circuits. Pad conditioning plays an important role in the CMP process to maintain a material removal rate (MRR) and its uniformity. For metal CMP process, highly acidic slurry containing strong oxidizer is being used. It would affect the conditioner surface which normally made of metal such as Nickel and its alloy. If conditioner surface is corroded, diamonds on the conditioner surface would be fallen out from the surface. Because of this phenomenon, not only life time of conditioners is decreased, but also more scratches are generated. To protect the conditioners from corrosion, thin organic film deposition on the metal surface is suggested without requiring current conditioner manufacturing process. To prepare the anti-corrosion film on metal conditioner surface, vapor SAM (self-assembled monolayer) and FC (Fluorocarbon) -CVD (SRN-504, Sorona, Korea) films were prepared on both nickel and nickel alloy surfaces. Vapor SAM method was used for SAM deposition using both Dodecanethiol (DT) and Perfluoroctyltrichloro silane (FOTS). FC films were prepared in different thickness of 10 nm, 50 nm and 100 nm on conditioner surfaces. Electrochemical analysis such as potentiodynamic polarization and impedance, and contact angle measurements were carried out to evaluate the coating characteristics. Impedance data was analyzed by an electrical equivalent circuit model. The observed contact angle is higher than 90o after thin film deposition, which confirms that the coatings deposited on the surfaces are densely packed. The results of potentiodynamic polarization and the impedance show that modified surfaces have better performance than bare metal surfaces which could be applied to increase the life time and reliability of conditioner during W CMP.
Interfacial Reaction of Ag Bump/Cu Land Interface for B
it Flash Memory Card Substrate
Hong, Won-Sik ; Cha, Sang-Suk ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 1, 2012, Pages 67~73
DOI : 10.6117/kmeps.2012.19.1.067
After flash memory card(FMC) was manufactured by
process, interfacial reaction of silver bump with thermal stress was studied. To investigate bonding reliability of Ag bump, thermal shock and thermal stress tests were conducted and then examined on the crack between Cu land and Ag bump interface. Diffusion reaction of Ag bump/Cu land interface was analyzed using SEM, EDS and FIB. The Ag-Cu alloy layer due to the interfacial reaction was formed at the Ag/Cu interface. As the diffusivity of Ag
Cu is faster than Cu
Ag, a lot of (Cu, Ag) alloy layers were observed at the Cu layer than Ag. These alloy layers contributed to increase the Cu-Ag bonding strength and its reliability.
Effects of Crystallinity and Stoichiometry on the Mobility of InSb Thin Films
Lee, Jeong-Young ; Lee, Byung-Soo ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 1, 2012, Pages 75~80
DOI : 10.6117/kmeps.2012.19.1.075
films were fabricated by DC magnetron sputtering and the effects of deposition temperature, heat treatment, passivation from evaporation and multi-layered structure were investigated. Electron mobility and electron concentration were linearly increased with deposition temperature for as-deposited specimens. It was found that the mobilities depend on the grain size rather than the stoichiometry for the samples with very low mobilities. The mobilities largely increased for the specimens with evaporation passivation compared with those without passivation layer. The mobility also increased with the amount of indium deposition in the multi-layer structured
films. It was found that the mobility increments in both cases are due to the matching of the stoichiometry in
films. For the heat treated and passivated specimens, the mobilities increased with annealing time and the maximum mobility was measured as 1612
Three-dimensional Machine Vision System based on moire Interferometry for the Ball Shape Inspection of Micro BGA Packages
Kim, Min-Young ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 1, 2012, Pages 81~87
DOI : 10.6117/kmeps.2012.19.1.081
This paper focuses on three-dimensional measurement system of micro balls on micro Ball-Grid-Array(BGA) packages in-line. Most of visual inspection system still suffers from sophisticate reflection characteristics of micro balls. For accurate shape measurement of them, a specially designed visual sensor system is proposed under the sensing principle of phase shifting moire interferometry. The system consists of a pattern projection system with four projection subsystems and an imaging system. In the projection system, four subsystems have spatially different projection directions to make target objects experience the pattern illuminations with different incident directions. For the phase shifting, each grating pattern of subsystem is regularly moved by PZT actuator. To remove specular noise and shadow area of BGA balls efficiently, a compact multiple-pattern projection and imaging system is implemented and tested. Especially, a sensor fusion algorithm to integrate four information sets, acquired from multiple projections, into one is proposed with the basis of Bayesian sensor fusion theory. To see how the proposed system works, a series of experiments is performed and the results are analyzed in detail.