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REFERENCE LINKING PLATFORM OF KOREA S&T JOURNALS
> Journal Vol & Issue
Journal of the Microelectronics and Packaging Society
Journal Basic Information
Journal DOI :
The Korean Microelectronics and Packaging Society
Editor in Chief :
Volume & Issues
Volume 19, Issue 4 - Dec 2012
Volume 19, Issue 3 - Sep 2012
Volume 19, Issue 2 - Jun 2012
Volume 19, Issue 1 - Mar 2012
Selecting the target year
Reliability Evaluation for Photovoltaic Modules
Tanaka, Hirokazu ; Kim, Keun-Soo ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 2, 2012, Pages 1~5
DOI : 10.6117/kmeps.2012.19.2.001
Long-term reliability of Si photovoltaic modules is a crucial issue for the cost-reduction on the power-supply system. To elevate this reliability, several environmental tests have been created as qualification and certification procedures. This paper gives an overview about recent researches of reliability tests for Si photovoltaic modules.
Numerical Analysis of Warpage and Stress for 4-layer Stacked FBGA Package
Kim, Kyoung-Ho ; Lee, Hyouk ; Jeong, Jin-Wook ; Kim, Ju-Hyung ; Choa, Sung-Hoon ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 2, 2012, Pages 7~15
DOI : 10.6117/kmeps.2012.19.2.007
Semiconductor packages are increasingly moving toward miniaturization, lighter and multi-functions for mobile application, which requires highly integrated multi-stack package. To meet the industrial demand, the package and silicon chip become thinner, and ultra-thin packages will show serious reliability problems such as warpage, crack and other failures. These problems are mainly caused by the mismatch of various package materials and geometric dimensions. In this study we perform the numerical analysis of the warpage deformation and thermal stress of 4-layer stacked FBGA package after EMC molding and reflow process, respectively. After EMC molding and reflow process, the package exhibits the different warpage characteristics due to the temperature-dependent material properties. Key material properties which affect the warpage of package are investigated such as the elastic moduli and CTEs of EMC and PCB. It is found that CTE of EMC material is the dominant factor which controls the warpage. The results of RSM optimization of the material properties demonstrate that warpage can be reduced by
. As the silicon die becomes thinner, the maximum stress of each die is increased. In particular, the stress of the top die is substantially increased at the outer edge of the die. This stress concentration will lead to the failure of the package. Therefore, proper selection of package material and structural design are essential for the ultra-thin die packages.
Thermo-mechanical Behavior of WB-PBGA Packages Considering Viscoelastic Material Properties
Kim, Man-Ki ; Joo, Jin-Won ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 2, 2012, Pages 17~28
DOI : 10.6117/kmeps.2012.19.2.017
It is known that thermo-mechanical properties of solder material and molding compound in WB-PBGA packages are considerably affected by not only temperature but elapsed time. In this paper, finite element analysis (FEA) taking material nonlinearity into account was performed for more reliable prediction on deformation behavior of a lead-free WB-PBGA package, and the results were compared with experimental results from moire interferometry. Prior to FEA on the WB-PBGA package, it was carried out for two material layers consisting of molding compound and substrate in terms of temperature and time-dependent viscoelastic effects of molding compound. Reliable deformation analysis for temperature change was then accomplished using viscoplastic properties for solder ball and viscoelastic properties for molding compound, and the analysis was also verified with experimental results. The result showed that the deformation of WB-PBGA packages was strongly dependent on material model of molding compound; thus, temperature and time-dependent viscoelastic behavior must be considered for the molding compound analysis. In addition, viscoelastic properties of B-type molding compound having comparatively high glass transition temperature of
could be recommended for reliable prediction on deformation of SAC lead-free WB-PBGA packages.
Fabrication and Challenges of Cu-to-Cu Wafer Bonding
Kang, Sung-Geun ; Lee, Ji-Eun ; Kim, Eun-Sol ; Lim, Na-Eun ; Kim, Soo-Hyung ; Kim, Sung-Dong ; Kim, Sarah Eun-Kyung ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 2, 2012, Pages 29~33
DOI : 10.6117/kmeps.2012.19.2.029
The demand for 3D wafer level integration has been increasing significantly. Although many technical challenges of wafer stacking are still remaining, wafer stacking is a key technology for 3D integration due to a high volume manufacturing, smaller package size, low cost, and no need for known good die. Among several new process techniques Cu-to-Cu wafer bonding is the key process to be optimized for the high density and high performance IC manufacturing. In this study two main challenges for Cu-to-Cu wafer bonding were evaluated: misalignment and bond quality of bonded wafers. It is demonstrated that the misalignment in a bonded wafer was mainly due to a physical movement of spacer removal step and the bond quality was significantly dependent on Cu bump dishing and oxide erosion by Cu CMP.
Effects of Intermetallic Compounds Formed during Flip Chip Process on the Interfacial Reactions and Bonding Characteristics
Ha, Jun-Seok ; Jung, Jae-Pil ; Oh, Tae-Sung ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 2, 2012, Pages 35~39
DOI : 10.6117/kmeps.2012.19.2.035
We studied interfacial reaction and bonding characteristics of a flip chip bonding with the viewpoint of formation behavior of intermetallic compounds. For this purpose, Sn-0.7Cu and Sn-3Cu solders were reflowed on the Al/Cu and Al/Ni UBMs. When Sn-0.7Cu was reflowed on the Al/Cu UBM, no intermetallic compounds were formed at the solder/UBM interface. The
intermetallic compounds formed by reflowing Sn-3Cu solder on the Al/Cu UBM were spalled from the interface, resulting in delamination of the solder/UBM interface. On the other hand, the
intermetallic compounds were formed by reflowing of Sn-0.7Cu and Sn-3Cu on the Al/Ni UBM and the interfacial bonding between the Sn-Cu solders and the Al/Ni UBM was kept stable.
Synthesis and Optical Properties of M-Si(Al)-O-N (M: Sr, Ca) Phosphors for white Light Emitting Diodes
Lee, Seung-Jae ; Lee, Jun-Seong ; Kim, Young-Jin ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 2, 2012, Pages 41~45
DOI : 10.6117/kmeps.2012.19.2.041
Oxynitride green phosphors for white light emitting diodes (LEDs) were synthesized and their optical properties were evaluated. The N/O ratio (
closely depended on the synthesizing conditions. The most excellent green emission (545 nm), which was assigned to the
ions, was achieved at the conditions of
, 5 mol%
atmosphere. The well-developed
particles with homogeneous size were obtained at m
Design for High-Efficient Passive Optical PCB Interconnection by Using Built-in Lens Structure
Kim, Dong-Min ; Lee, Tae-Kyoung ; Lee, Tae-Ho ; Jeong, Myung-Yung ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 2, 2012, Pages 47~53
DOI : 10.6117/kmeps.2012.19.2.047
Recently, by the increasing of data transmission rates, PCB is required high-speed data transmission rates and thin packaging. So optical PCB which is the combination of electrical layer and optical layer can be one of the solution to overcome the limitations of conventional electrical PCB. The most important factor in the implementation of optical PCB is optical interconnection. So the research on high-efficiency and passive alignment has been active. In this paper, we suggest built-in lens pluggable waveguide and we simulate its coupling efficiency and structural stability. Optical simulation results show that the proposed structure has higher efficiency than no lens structure about 1.86 times in transmitter and about 1.42 times in receiver. In structure simulation, inner lens has no damage in desorption process. Therefore, we shown that the proposed structure has a high coupling efficiency and structural stability.
The Effects of Levelers on Electrodeposition of Copper in TSV Filling
Jung, Myung-Won ; Kim, Ki-Tae ; Koo, Yeon-Soo ; Lee, Jae-Ho ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 2, 2012, Pages 55~59
DOI : 10.6117/kmeps.2012.19.2.055
Defects such as voids or seams are frequently found in TSV via filling process. To achieve defect-free copper via filling, organic additives such as suppressor, accelerator and leveler were necessary in a copper plating bath. However, by-products stemming from the breakdown of these organic additives reduce the lifetime of the devices and plating solutions. In this research, the effects of levelers on copper electrodeposition were investigated without suppressor and accelerator to lower the concentration of additives. Threelevelers(janus green B, methylene violet, diazine black) were investigated to study the effects of levelers on copper deposition. Electrochemical behaviors of these levelers were different in terms of deposition rate. Filling performances were analyzed by cross sectional images and its characteristics were different with variations of levelers.
Synthesis of Bi Nanoparticles Using a Modified Polyol Method
Cho, Hye-Jung ; Lee, Jong-Hyun ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 2, 2012, Pages 61~66
DOI : 10.6117/kmeps.2012.19.2.061
Bismuth(Bi) nanoparticles were synthesized at room temperature by a modified polyol process using bismuth(III) carbonate basic as precursor. In addition, some characteristics of the synthesis with respect to the exchange of a capping agent/surface stabilizer and solvent type were observed. When polyvinylpyrroldone was added, the finest Bi nanoparticles were synthesized in diethylene glycol(DEG), while the coarsest nanoparticles were formed in polyethylene glycol(PEG). The particle size immediately after synthesis was proportionate to final particle size which was determined by particle growth through coalescence and aggregation during drying. As a result, the finest Bi particles with the diameter range of several tens of nanometers - 300 nm were finally obtained in DEG. Regardless of the type of capping agent/surface stabilizer, extensive coalescence and aggregation behavior occurred in PEG, resulting in final products agglomerated with coarse particles.
The Effects of Levelers on Electroplating of Thin Copper Foil for FCCL
Kang, In-Seok ; Koo, Yeon-Soo ; Lee, Jae-Ho ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 2, 2012, Pages 67~72
DOI : 10.6117/kmeps.2012.19.2.067
In recent days, the wire width of IC is narrowed and the degree of integration of IC is increased to obtain the higher capacity of the devices in electronic industry. And then the surface quality of FCCL(Flexible Copper Clad Laminate) became increasingly important. Surface defects on FCCL are bump, scratch, dent and so on. In particular, bumps cause low reliability of the products. Even though there are bumps on the surface, if leveling characteristic of plating solution is good, it does not develop significant bump. In this study, the leveling characteristics of additives are investigated. The objective of study is to improve the leveling characteristic and reduce the surface step through additives and plating conditions. The additives in the electrodeposition bath are critical to obtain flat surface and free of defects. In order to form flat copper surface, accelerator, suppressor and leveler are added to the stock solution. The reason for the addition of leveler is planarization surface and inhibition of the formation of micro-bump. Levelers (SO(Safranin O), MV(Methylene Violet), AB(Alcian Blue), JGB(Janus Green B), DB(Diazine Black) and PVP(Polyvinyl Pyrrolidone) are used in copper plating solution to enhance the morphology of electroplated copper. In this study, the nucleation and growth behavior of copper with variation of additives are studied. The leveling characteristics are analyzed on artificially fabricated Ni bumps.
Surface Oxidation Effect During high Temperature Vacuum Annealing on the Electrical Conductivity of ZnO thin Films Deposited by ALD
Kim, Jin-Yong ; Choi, Yong-June ; Park, Hyung-Ho ;
Journal of the Microelectronics and Packaging Society, volume 19, issue 2, 2012, Pages 73~78
DOI : 10.6117/kmeps.2012.19.2.073
The chemical, electrical, and optical properties of ZnO and Al-doped ZnO films after high temperature annealing were studied. The resistivity increased significantly after annealing at
Torr atmosphere. The mechanism of the resistivity change was explored using photoemission spectroscopy and photoluminescence spectrometer. The results indicated that the amount of oxygen deficient region O-Zn bonds decreased and oxygen vacancy was decreased after the high temperature vacuum annealing. The increase in the resistivity of ZnO and Al-doped ZnO films was resulted from the decrease in carrier concentration due to a decrease in the amount of oxygen deficiency.