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REFERENCE LINKING PLATFORM OF KOREA S&T JOURNALS
> Journal Vol & Issue
Journal of the Microelectronics and Packaging Society
Journal Basic Information
Journal DOI :
The Korean Microelectronics and Packaging Society
Editor in Chief :
Volume & Issues
Volume 7, Issue 4 - Nov 2000
Volume 7, Issue 3 - Sep 2000
Volume 7, Issue 2 - Jun 2000
Volume 7, Issue 1 - Mar 2000
Selecting the target year
Fabrication and Characterization of Buried Resistor for RF MCM-C
Journal of the Microelectronics and Packaging Society, volume 7, issue 1, 2000, Pages 1~5
Co-fired resistors for high frequency MCM-C (Multi Chip Module-Cofired) were fabricated and measured their RF properties from DC to 6 GHz. LTCC (Low Temperature Co-fired Ceramics) substrates with 8 layers were used as the substrates. Resisters and electrodes were printed on the 7th layer and connected to the top layer by via holes. Deviation from DC resistance of the resistors was resulted from the resister pastes, resistor size, and via length. From the experimental results, the suitable equivalent circuit model was adopted with resistor, transmission line, capacitor, and inductor. The characteristic impedance
of the transmission line from the equivalent circuit can explain the RF behavior of the buried resistor according to the structural variation.
Vacuum-Electrostatic Bonding Properties of Glass-to-Glass Substrates
Journal of the Microelectronics and Packaging Society, volume 7, issue 1, 2000, Pages 7~12
As an essential technology for the FED, VFD and PDP packaging having merits of no glass frit and no glass tube usage, two sodalime glass substrates were electrostatically-bonded in a vacuum environment, and the bond properties were compared with the case of bonding in atmosphere. The glass wafer pairs bonded in vacuum using a-Si interlayer had a relatively lower bond strength than the ones bonded in atmosphere under same bonding conditions (temperature and voltage). And the bond strength was increased in the case of oxygen ambient. Through the XPS and SIMS analyses fur the surface region of a-silicon and bulk glass, it might be concluded that the lower bonding strength was originated from the inactive silicon oxide growth occurred during the electrostatic bonding process due to oxygen deficiency in vacuum.
Characteristics of Embedded R, L, C Fabricated by Using LTCC-M Technology and Development of a PAM for LMR thereby
Journal of the Microelectronics and Packaging Society, volume 7, issue 1, 2000, Pages 13~18
Low temperature co-fired ceramics on metal (LTCC-M) is efficient for embedding passive components with good tolerance in a module due to the dimensional stability in x and y directions by the constraint of metal core during the firing. In addition, the radiation noise can be reduced by metal core. In this paper, embedded passive components were introduced and a power amplifier module (PAM) fabricated by using the passive components was explained. The embedded passive components in test patters showed the tolerance of 10~20% and the good repeatability in tolerance of embedded passives was maintained in module fabrication. The shortened traces in multi chip modules (MCMs) make the signal delay time decreased and the embedded passives simplify the packaging processes owing to the less solder points, which enhance the electrical performance and increase the reliability of the modules. The LTCC-M technology is one of the promising candidates for RF application and is expected to expand its applications to power and high performance devices.
Microstructure and Adhesion Strength of Sn-Sn Mechanical Joints for Stacked Chip Package
Journal of the Microelectronics and Packaging Society, volume 7, issue 1, 2000, Pages 19~24
To make stacked chip packages far high-density packaging of memory chips used in workstations or PC severs, several lead-frames are to be connected vertically. Fer this purpose. Sn or Sn/Ag were electrochemically deposited on Cu lead-frames and their microstructures were examined by XRD and SEM. Then, two specimens were annealed at
for 10 min. and pressed to be joined. The shear stresses of joined lead-frames were measured fur comparison. In the case of Sn only,
was formed by the reaction of Sn and Cu lead-frames. In the case of Sn/Ag, besides
was formed by the reaction of Sn and Ag. Compared to joined specimens made from Sn only, those made from Sn/Ag showed 1.2 times higher shear stress. This was attributed to the
phase formed at the joined interface.
Structural Characteristics on InAs Quantum Dots multi-stacked on GaAs(100) Substrates
Roh, Cheong-Hyun ; Park, Young-Ju ; Kim, Eun-Kyu ; Shim, Kwang-Bo ;
Journal of the Microelectronics and Packaging Society, volume 7, issue 1, 2000, Pages 25~28
The InAs self-assembled quantun dots (SAQDS) were grown on a GaAs(100) substrate using a molecular beam epitaxy (MBE) technique. The InAs QDs were multi-stacked to have various layer structures of 1, 3, 6, 10, 15 and 20 layers, where the thickness of the GaAs spacer and InAs QD layer were 20 monolayers (MLs) and 2 MLs, respectively. The nanostructured feature was characterized by photoluminescence (PL) and scanning transmission electron microscopy (STEM). It was found that the highest PL intensity was obtained from the specimen with 6 stacking layers and the energy of the PL peak was split with increasing the number of stacking layers. The STEM investigation exhibited that the quantum dots in the 6 stacking layer structure were well aligned in vertical columns without any deflect generation, whereas the volcano-like deflects were formed vertically along the growth direction over 10 periods of InAs stacking layers.
A Study on the Design of the Micro-Mirror Considering the Squeeze Effects of Gas Film
Journal of the Microelectronics and Packaging Society, volume 7, issue 1, 2000, Pages 29~34
In this paper, the damping characteristics for electrostatically driven micro mirror which have deep grooves on their driving electrodes were investigated. A coupled simulation of gas flow and structural displacement of the micro mirror using the Finite-Element-Method is applied to this. The damping farce is caused by squeeze action of the gas film between a moving mirror plate and the electrodes. The grooves decrease the damping force and enable the moving plate to be driven at high speed and low driving voltage.
Characterization of Fluorocarbon Thin Films by Contact Angle Measurements and AFM/LFM
Journal of the Microelectronics and Packaging Society, volume 7, issue 1, 2000, Pages 35~40
Teflon-like fluorocarbon thin film was deposited on various substrates by vapor deposition using PFDA (perfluorodecanoic acid). The fluorocarbon films were characterized by static/dynamic contact angle analysis, VASE (Variable-angle Spectroscopic Ellipsometry) and AFM/LFM (Atomic/Lateral Force Microscopy). Based on Lewis Acid/Base theory, the surface energy (
) of the films was calculated by the static contact angle measurement. The work of adhesion (WA) between de-ionized water and substrates was calculated by using the static contact data. The fluorocarbon films showed very similar values of the surface energy and work of adhesion to Teflon. All films showed larger hysteresis than that of Teflon. The roughness and relative friction force of films were measured by AFM and LFM. Even though the small reduction of surface roughness was found on film on
surface, the large reduction of relative friction farce was observed on all films. Especially the relative friction force on TEOS was decreased a quarter after film deposition. LFM images showed the formation of "strand-like"spheres on films that might be the reason far the large contact angle hysteresis.
Reliability Enhancement of Anisotropic Conductive Adhesives Flip Chip on Organic Substrates by Non-Conducting Filler Additions
Paik, Kyung-Wook ; Yim, Myung-Jin ;
Journal of the Microelectronics and Packaging Society, volume 7, issue 1, 2000, Pages 41~49
Flip chip assembly on organic substrates using ACAs have received much attentions due to many advantages such as easier processing, good electrical performance, lower cost, and low temperature processing compatible with organic substrates. ACAs are generally composed of epoxy polymer resin and small amount of conductive fillers (less than 10 wt.%). As a result, ACAs have almost the same CTE values as an epoxy material itself which are higher than conventional underfill materials which contains lots of fillers. Therefore, it is necessary to lower the CTE value of ACAs to obtain more reliable flip chip assembly on organic substrates using ACAs. To modify the ACA composite materials with some amount of conductive fillers, non-conductive fillers were incorporated into ACAs. In this paper, we investigated the effect of fillers on the thermo-mechanical properties of modified ACA composite materials and the reliability of flip chip assembly on organic substrates using modified ACA composite materials. For the characterization of modified ACAs composites with different content of non-conducting fillers, dynamic scanning calorimeter (DSC), and thermo-gravimetric analyser (TGA), dynamic mechanical analyzer (DMA), and thermo-mechanical analyzer (TMA) were utilized. As the non-conducting filler content increased, CTE values decreased and storage modulus at room temperature increased. In addition, the increase in the content of filler brought about the increase of
. However, the TGA behaviors stayed almost the same. Contact resistance changes were measured during reliability tests such as thermal cycling, high humidity and temperature, and high temperature at dry condition. It was observed that reliability results were significantly affected by CTEs of ACA materials especially at the thermal cycling test. Results showed that flip chip assembly using modified ACA composites with lower CTEs and higher modulus by loading non-conducting fillers exhibited better contact resistance behavior than conventional ACAs without non-conducting fillers.
Critical Cleaning Requirements for Back End Wafer Bumping Processes
Bixenman, Mike ;
Journal of the Microelectronics and Packaging Society, volume 7, issue 1, 2000, Pages 51~59
As integrated circuits become more complex, the number of I/O connections per chip grow. Conventional wire-bonding, lead-frame mounting techniques are unable to keep up. The space saved by shrinking die size is lost when the die is packaged in a huge device with hundreds of leads. The solution is bumps; gold, conductive adhesive, but most importantly solder bumps. Virtually every semiconductor manufacturer in the world is using or planning to use bump technology for their larger and more complex devices. Several wafer-bumping processes used in the manufacture of bumped wafer. Some of the more popular techniques are evaporative, stencil or screen printing, electroplating, electroless nickel, solder jetting, stud humping, decal transfer, punch and die, solder injection or extrusion, tacky dot process and ball placement. This paper will discuss the process steps for bumping wafers using these techniques. Critical cleaning is a requirement for each of these processes. Key contaminants that require removal are photoresist and flux residue. Removal of these contaminants requires wet processes, which will not attack, wafer metallization or passivation. Research has focused on enhanced cleaning solutions that meet this critical cleaning requirement. Process parameters defining time, temperature, solvency and impingement energy required to solvate and remove residues from bumped wafers will be presented herein.
Critical Cleaning Requirements for Flip Chip Packages
Bixenman, Mike ; Miller, Erik ;
Journal of the Microelectronics and Packaging Society, volume 7, issue 1, 2000, Pages 61~73
In traditional electronic packages the die and the substrate are interconnected with fine wire. Wire bonding technology is limited to bond pads around the peripheral of the die. As the demand for I/O increases, there will be limitations with wire bonding technology.