Go to the main menu
Skip to content
Go to bottom
REFERENCE LINKING PLATFORM OF KOREA S&T JOURNALS
> Journal Vol & Issue
IEMEK Journal of Embedded Systems and Applications
Journal Basic Information
Journal DOI :
Institute of Embedded Engineering of Korea
Editor in Chief :
Volume & Issues
Volume 10, Issue 6 - Dec 2015
Volume 10, Issue 5 - Oct 2015
Volume 10, Issue 4 - Aug 2015
Volume 10, Issue 3 - Jun 2015
Volume 10, Issue 2 - Apr 2015
Volume 10, Issue 1 - Feb 2015
Selecting the target year
SeBo: Secure Boot System for Preventing Compromised Android Linux
Kim, Tong Min ; Kim, Se Won ; Yoo, Chuck ;
IEMEK Journal of Embedded Systems and Applications, volume 10, issue 6, 2015, Pages 335~343
DOI : 10.14372/IEMEK.2015.10.6.335
As the usage of mobile devices becomes diverse, a number of attacks on Android also have increased. Among the attacks, Android can be compromised by flashing a new image of compromised Android Linux. In order to solve this problem, we propose SeBo (Secure Boot System) which prevents compromised Android Linux by guaranteeing secure boot environment for mobile devices based on ARM TrustZone architecture. SeBo checks the hash value of the Android Linux image before the Android Linux executes. SeBo detects all the attacks within 5 seconds. Moreover, since SeBo only trusts the Secure Bootloader from Secure World, SeBo can reduce the additional overhead of checking the Normal Bootloader from Normal World.
Interoperable Middleware Gateway Based on HLA and DDS for L-V-C Simulation Training Systems
Jun, Hyung Kook ; Eom, Young Ik ;
IEMEK Journal of Embedded Systems and Applications, volume 10, issue 6, 2015, Pages 345~352
DOI : 10.14372/IEMEK.2015.10.6.345
Recently, by developing many training systems in battle field, the demand for interconnecting and internetworking between Live, Virtual, Constructive training systems has been increased to support efficient data distribution and system control. But, there are lots of problems for them to interwork, because the existing researches only support L-L, V-V, C-C Interoperability. Therefore, we propose L-V-C gateway to provide interoperable simulation environment based on HLA and DDS between them. First, we illustrate FOM Management that parses RPR-FOM XML file to acquire Data information to be shared between them, and generates common data structure and source code used for L-V-C Gateway. L-V-C Gateway created from FOM Management supports Data Conversion and Quality of Service between HLA and DDS. HLA Federate and DDS Domainparticipant in L-V-C Gateway play a role of logical communication channel and relay data from HLA Federation to DDS Domain and vice versa.
Agent-based Adaptive Multimedia Streaming Considering Device Capabilities and Dynamic Network Conditions
Jang, Minsoo ; Seong, Chaemin ; Kim, Jingu ; Lim, Kyungshik ;
IEMEK Journal of Embedded Systems and Applications, volume 10, issue 6, 2015, Pages 353~362
DOI : 10.14372/IEMEK.2015.10.6.353
In order to provide smart devices with high quality multimedia streaming services, an adaptive streaming technique over HTTP has been received much attention recently and the Dynamic Adaptive Streaming over HTTP (DASH) standard has been established. In DASH, however, the technique to select an appropriate quality of multimedia based on the performance metrics measured in a smart device might have some difficulties to reflect the capabilities of other neighboring smart devices and dynamic network conditions in real time. To solve the problem, this paper proposes a novel software agent approach, called DASH agent (DA), which gathers and analyzes the device capabilities and dynamic network conditions in real time and finally determines the highest achievable quality of segment to meet the best Quality of Experience (QoE) in current situations. The simulation results show that our approach provides higher quality of multimedia segments with less frequency of quality changes to lower quality of multimedia segments.
An Implementation of SoC FPGA-based Real-time Object Recognition and Tracking System
Kim, Dong-Jin ; Ju, Yeon-Jeong ; Park, Young-Seak ;
IEMEK Journal of Embedded Systems and Applications, volume 10, issue 6, 2015, Pages 363~372
DOI : 10.14372/IEMEK.2015.10.6.363
Recent some SoC FPGA Releases that integrate ARM processor and FPGA fabric show better performance compared to the ASIC SoC used in typical embedded image processing system. In this study, using the above advantages, we implement a SoC FPGA-based Real-Time Object Recognition and Tracking System. In our system, the video input and output, image preprocessing process, and background subtraction processing were implemented in FPGA logics. And the object recognition and tracking processes were implemented in ARM processor-based programs. Our system provides the processing performance of 5.3 fps for the SVGA video input. This is about 79 times faster processing power than software approach based on the Nios II Soft-core processor, and about 4 times faster than approach based the HPS processor. Consequently, if the object recognition and tracking system takes a design structure combined with the FPGA logic and HPS processor-based processes of recent SoC FPGA Releases, then the real-time processing is possible because the processing speed is improved than the system that be handled only by the software approach.
Implementation of a Hybrid Navigation System for a Mobile Robot by Using INS/GPS and Indirect Feedback Kalman Filter
Kim, Min J. ; Joo, Moon G. ;
IEMEK Journal of Embedded Systems and Applications, volume 10, issue 6, 2015, Pages 373~379
DOI : 10.14372/IEMEK.2015.10.6.373
A hybrid navigation system is implemented to apply for a mobile robot. The hybrid navigation system consists of an inertial navigation system and a global positioning system. The inertial navigation system quickly calculates the position and the attitude of the robot by integrating directional accelerations, angular speed, and heading angle from a strap-down inertial measurement unit, but the results are available for a short time since it tends to diverge quickly. Global positioning system delivers position, heading angle, and traveling speed stably, but it has large deviation with slow update. Therefore, a hybrid navigation system uses the result from an inertial navigation system and corrects the result with the help of the global positioning system where an indirect feedback Kalman filter is used. We implement and confirm the performance of the hybrid navigation system through driving a car attaching it.
A Robust Transport Protocol Based on Intra-Cluster Node Density for Wireless Sensor Networks
Baek, Cheolheon ; Moh, Sangman ;
IEMEK Journal of Embedded Systems and Applications, volume 10, issue 6, 2015, Pages 381~390
DOI : 10.14372/IEMEK.2015.10.6.381
The efficient design of a transport protocol contributes to energy conservation as well as performance improvement in wireless sensor networks (WSNs). In this paper, a node-density-aware transport protocol (NDTP) for intra-cluster transmissions in WSNs for monitoring physical attributes is proposed, which takes node density into account to mitigate congestion in intra-cluster transmissions. In the proposed NDTP, the maximum active time and queue length of cluster heads are restricted to reduce energy consumption. This is mainly because cluster heads do more works and consume more energy than normal sensor nodes. According to the performance evaluation results, the proposed NDTP outperforms the conventional protocol remarkably in terms of network lifetime, congestion frequency, and packet error rate.
PCM Main Memory for Low Power Embedded System
Lee, Jung-Hoon ;
IEMEK Journal of Embedded Systems and Applications, volume 10, issue 6, 2015, Pages 391~397
DOI : 10.14372/IEMEK.2015.10.6.391
Nonvolatile memories in memory hierarchy have been investigated to reduce its energy consumption because nonvolatile memories consume zero leakage power in memory cells. One of the difficulties is, however, that the endurance of most nonvolatile memory technologies is much shorter than the conventional SRAM and DRAM technology. This has limited its usage to only the low levels of a memory hierarchy, e.g., disks, that is far from the CPU. In this paper, we study the use of a new type of nonvolatile memories - the Phase Change Memory (PCM) with a DRAM buffer system as the main memory. Our design reduced the total energy of a DRAM main memory of the same capacity by 80%. These results indicate that it is feasible to use PCM technology in place of DRAM in the main memory for better energy efficiency.