• Title, Summary, Keyword: 와이어 본딩

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Development of Packaging Technology for CdTe Multi-Energy X-ray Image Sensor (CdTe 멀티에너지 엑스선 영상센서 패키징 기술 개발)

  • Kwon, Youngman;Kim, Youngjo;Ryu, Cheolwoo;Son, Hyunhwa;Kim, Byoungwook;Kim, YoungJu;Choi, ByoungJung;Lee, YoungChoon
    • Journal of the Korean Society of Radiology
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    • v.8 no.7
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    • pp.371-376
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    • 2014
  • The process of flip-chip bump bonding, Au wire bonding and encapsulation were sucessfully developed and modularized. The CdTe sensor and ROIC were optimally jointed together at $150^{\circ}C$ and $270^{\circ}C$ respectively under24.5 N for 30s. To make SnAg bump on ROIC easy to be bonded, the higher bonding temperature was established than CdTe sensor's. In addition, the bonding pressure was lowered minimally because CdTe Sensor is easier to break than Si Sensor. CdTe multi-energy sensor module observed were no electrical failures in the joints using developed flip chip bump bonding and Au wire bonding process. As a result of measurement, shearing force was $2.45kgf/mm^2$ and, it is enough bonding force against threshold force, $2kgf/mm^2s$.

The design of microscopic system using zoom structure with a fixed magnification and the independency on the variation of object distance (줌 구조를 이용하여 물체거리가 변해도 상면과 배율이 고정되는 현미경 광학계의 설계)

  • 류재명;조재흥;임천석;정진호;전영세;이강배
    • Korean Journal of Optics and Photonics
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    • v.14 no.6
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    • pp.613-622
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    • 2003
  • The multi-configurative microscopic system for inspecting the wire-bonding of reed frame is designed. Rays refracted by objective lens group which is composed of common lens group of x2 and x6 are splitted by beam-splitter, and Rays through the central region and the boundary region of the object imaged at x2 and x6 through imaging lens groups, respectively. The depth of wire structure on the reed frame has about $\pm$3 mm, in order to observe by uniform magnification without the dependency on the variation of objective distance generated by the depth of wire structure on the reed frame, imaging lens groups should be moved on nonlinear locus like mechanically compensated zoom lenses. The nonlinear equations for zoom locus are derived by using the Gaussian bracket. Refraction powers and positions of each groups are numerically determined by solving the equations, and initial design data for each groups is obtained by using Seidel third order aberration theory. The optimization technique is finally utilized to obtain this microscopic system.

Implementation of High-Q Bondwire Inductors on Silicon RFIC (RFIC를 위한 실리콘 기판에서의 고품질 본드와이어 인덕터 구현)

  • 최근영;송병욱;김성진;이해영
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.39 no.12
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    • pp.559-565
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    • 2002
  • Today, because a quality factor of the inductor fabricated on silicon substrate for RFIC is under 12, the realization of inductor haying high-Q is essential. In this paper, two inductors having improved Q-factor are proposed and fabricated using a bondwire on silicon substrate. Also for the PGS is applied to the same inductors, four inductors are fabricated finally The bondwire Inductors have the relatively low conductor loss due to wide cross-section area and they can reduce the parastic capacitance very much because they are located in the air. Simulation and measurement results show that the proposed inductors have much more improved Q-factor, 15, than a conventional spiral inductor at 1.5 GHz. Because of the use of an automatic bonding machine, we can fabricate the high - Q inductors very easily, repeatedly.

C-Band Internally Matched GaAs Power Amplifier with Minimized Memory Effect (Memory Effect를 최소화한 C-대역 내부 정합 GaAs 전력증폭기)

  • Choi, Woon-Sung;Lee, Kyung-Hak;Eo, Yun-Seong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.11
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    • pp.1081-1090
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    • 2013
  • In this paper, a C-band 10 W power amplifier with internally matched input and output matching circuit is designed and fabricated. The used power transistor for the power amplifier is GaAs pHEMT bare-chip. The wire bonding analysis considering the size of the capacitor and the position of transistor pad improves the accurate design. The matching circuit design with the package effect using EM simulation is performed. To reduce the unsymmetry of IMD3 in 2-tone measurement due to the memory effect, the bias circuit minimizing the memory effect is proposed and employed. The measured $P_{1dB}$, power gain, and power added efficiency are 39.8~40.4 dBm, 9.7~10.4 dB, and 33.4~38.0 %, respectively. Adopting the proposed bias circuit, the difference between the upper and lower IMD3 is less than 0.76 dB.

FE-simulation of Drawing Process for Al-1%Si Bonding Wire Considering Fine Si Particle (미세 Si 입자를 고려한 Al-1%Si 본딩 와이어의 신선공정해석)

  • Ko, D.C.;Hwang, W.H.;Lee, S.K.;Kim, B.M.
    • Transactions of Materials Processing
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    • v.15 no.6
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    • pp.421-427
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    • 2006
  • Drawing process of Al-1%Si bonding wire considering fine Si particle is analyzed in this study using FE-simulation. Al-1%Si boding wire requires electric conductivity because Al-1%Si bonding wire is used for interconnection in semiconductor device. About 1% of Si is added to Al wire for dispersion-strengthening. Distribution and shape of fine Si particle have strongly influence on the wire drawing process. In this study, therefore, the finite-element model based on the observation of wire by continuous casting is used to analyze the effect of various parameters, such as the reduction in area, the semi-die angle, the aspect ratio, the inter-particle spacing and orientation angle of the fine Si particle on wire drawing processes. The effect of each parameter on the wire drawing process is investigated from the aspect of ductility and defects of wire. From the results of the analysis, it is possible to obtain the important basic data which can be guaranteed in the fracture prevention of Al-1 %Si wire.

Reduction of the bondwire parasitic effect using dielectric materials for microwave device packaging (초고주파 소자 실장을 위한 유전체를 이용하는 본딩와이어 기생 효과 감소 방법)

  • 김성진;윤상기;이해영
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.34D no.2
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    • pp.1-9
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    • 1997
  • For the reduction of parasitic inductance and matching of bonding wire in the package of microwave devices, we propose multiple bonding wires buried in a dielectric material of FR-4 composite. This structure is analyzed using the method of moments (MoM) and compared with the common bondwires and ribbon interconnections. The FR-4 composite is modelled by the cole-cole model which can consider the loss and the variation of the permittivity in a frequency. At 20 GHz, the parasitic reactance is reduced by 90%, 80%, 60% compared to those of a single bonding wire in air, double bonding wires in air and ribbon interconnection in air, respectively. Also, the new bondwire shows very good matching of 60.ohm characteristic impedance and has 15dB, 10dB, 5dB improvement of the return loss and 2.5dB, 0.7dB, 0.2dB improvement of the insertion loss compared to the common interconnections. This technique can minimize the parasitic effect of bondwires in microwave device packaging.

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Thermal Properties of Two-Layered Materials Composed of Dielectric Layer on Metallic Substrate along the Thickness Direction (금속기판에 유전체 후막을 형성시켜 제조한 2층 층상재료에서 두께 방향의 열전도 특성)

  • Kim, Jong-Gu;Jeong, Ju-Young;Ju, Jae-Hoon;Park, Sang-Hee;Cho, Young-Rae
    • Journal of the Microelectronics and Packaging Society
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    • v.23 no.4
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    • pp.87-92
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    • 2016
  • The importance of heat dissipation for the electric device modules along the thickness direction is increasing. Two types of two-layered materials, metal-metal bonding and dielectric-metal bonding, have been fabricated by roll bonding process and a thermal diffusivity of the specimens was measured along the thickness direction. The thermal diffusivity of specimens with metal-metal bonding measured by light flash analysis (LFA) showed a same value independent on the direction of heat flow. However, the thermal diffusivity of specimens with dielectric-metal bonding showed a big difference of 17.5% when the direction of heat flow changed oppositely in the LFA process. The measured thermal diffusivity of specimens when the heat flows from metal to dielectric direction showed smaller value of 17.5% compared to the value when the heat flow from dielectric to metal direction. The difference in thermal diffusivity of specimens with dielectric-metal bonding dependence on direction of heat flow is due to the electron-phonon resistance that occurred transfer process of electron energy to phonon energy near the interface.

Pulsed-Bias Pulsed-RF Passive Load-Pull Measurement of an X-Band GaN HEMT Bare-chip (X-대역 GaN HEMT Bare-Chip 펄스-전압 펄스-RF 수동 로드-풀 측정)

  • Shin, Suk-Woo;Kim, Hyoung-Jong;Choi, Gil-Wong;Choi, Jin-Joo;Lim, Byeong-Ok;Lee, Bok-Hyung
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.10 no.1
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    • pp.42-48
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    • 2011
  • In this paper, a passive load-pull using a GaN HEMT (Gallium Nitride High Electron Mobility Transistor) bare-chip in X-band is presented. To obtain operation conditions that characteristic change by self-heating was minimized, pulsed drain bias voltage and pulsed-RF signal is employed. An accuracy impedance matching circuits considered parasitic components such as wire-bonding effect at the boundary of the drain is accomplished through the use of a electro-magnetic simulation and a circuit simulation. The microstrip line length-tunable matching circuit is employed to adjust the impedance. The measured maximum output power and drain efficiency of the pulsed load-pull are 42.46 dBm and 58.7%, respectively, across the 8.5-9.2 GHz band.

Thermo-mechanical Behavior of Wire Bonding PBGA Packages with Different Solder Ball Grid Patterns (Wire Bonding PBGA 패키지의 솔더볼 그리드 패턴에 따른 열-기계적 거동)

  • Joo, Jin-Won
    • Journal of the Microelectronics and Packaging Society
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    • v.16 no.2
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    • pp.11-19
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    • 2009
  • Thermo-mechanical behaviors of wire-bond plastic ball grid array (WB-PBGA) package assemblies are characterized by high-sensitivity moire interferometry. Using the real-time moire setup, fringe patterns are recorded and analyzed for several temperatures. Experiments are conducted for three types of WB-PBGA package that have full grid pattern and perimeter pattern with/without central connections. Bending deformations of the assemblies and average strains of the solder balls are investigated, with an emphasis on the effect of solder interconnection grid patterns, Thermal strain distributions and the location of the critical solder ball in package assemblies are quite different with the form of solder ball grid pattern. For the WB-PBGA-PC, The largest of effective strain occurred in the inner solder ball of perimeter closest to the chip solder balls. The critical solder ball is located at the edge of the chip for the WB-PBGA-FG, at the most outer solder ball of central connections for the WB-PBGA-P/C, and at the inner solder ball closest to the chip for the WB-PBGA-P.

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A Low Insertion Loss CBFGCPW-Microstrip Transition and Its Application to MIC Module Integration (저 손실을 갖는 CBFGCPW-Microstrip 천이 구조의 해석 및 MIC 모듈 집적화에 응용)

  • Lim, Ju-Hyun;Yang, Seong-Sik;Yeom, Kyung-Whan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.7
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    • pp.809-818
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    • 2007
  • Generally, carriers on which microwave circuits are mounted are used as building blocks of MIC module for the convenience of MIC assembly and the unit module characterization. However the interconnection of the microstrip-based carriers by wire bonding causes the serious problem of mismatch and results in the higher insertion loss as frequency becomes higher. The gap and the depth between carriers are considered as the main reason of the degradation. The CPW can be the solution to cope with such problem considering its field are dominantly concentrated on the top plane. In this paper, we propose and demonstrate the CBFGCPW to microstrip transition with the low insertion loss that can be applied without causing the MIC carrier interconnection problem.