• Title, Summary, Keyword: 캐쉬 교체방식

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Performance Analysis of Replacement Policies for Internet Proxy Cache (인터넷 프록시 캐쉬를 위한 교체 방식의 성능분석)

  • 이효일
    • Proceedings of the Korea Society for Simulation Conference
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    • pp.138-143
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    • 1999
  • 초고속 정보통신망을 비롯한 인프라의 구축이 확대되면서 다양한 종류의 정보 서비스들이 활성화되고 있다. 최근 인터넷의 사용자 수가 크게 증가함에 따라 웹 서버에 걸리는 부하와 통신망의 트래픽이 급증하고 있으며, 이들은 응답시간을 지연시키는 주요 요인이 되고 있다. 이러한 문제를 해결하기 위하여 액세스 빈도가 높은 정보는 클라이언트에 가까이 위치한 프록시 서버에 캐슁함으로써 웹서버의 병목현상을 완화시키고, 통신망의 트래픽을 줄이며, 서비스 응답시간을 줄일 수 있다. 또한 여러 프록시 캐쉬들에 저장된 정보들을 클라이언트들이 공유함으로써 인터넷 성능을 보다 향상시킬수 있다. 본 논문에서는 실제 웹 트레이스를 이용한 시뮬레이션을 이용하여, 3-레벨 4진 트리(3-level 4-ary tree) 구조의 계층적 프록시 캐슁 환경에서 캐쉬 교체 정책에 따른 캐쉬 적중률의 변화를 분석하고, 인터넷 서비스 향상을 위한 최적의 교체방식을 제안한다.

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Core-aware Cache Replacement Policy for Reconfigurable Last Level Cache (재구성 가능한 라스트 레벨 캐쉬 구조를 위한 코어 인지 캐쉬 교체 기법)

  • Son, Dong-Oh;Choi, Hong-Jun;Kim, Jong-Myon;Kim, Cheol-Hong
    • Journal of the Korea Society of Computer and Information
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    • v.18 no.11
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    • pp.1-12
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    • 2013
  • In multi-core processors, Last Level Cache(LLC) can reduce the speed gap between the memory and the core. For this reason, LLC has big impact on the performance of processors. LLC is composed of shared cache and private cache. In computer architecture community, most researchers have mainly focused on the management techniques for shared cache, while management techniques for private cache have not been widely researched. In conventional private LLC, memory is statically assigned to each core, resulting in serious performance degradation when the workloads are not fairly distributed. To overcome this problem, this paper proposes the replacement policy for managing private cache of LLC efficiently. As proposed core-aware cache replacement policy can reconfigure LLC dynamically, hit rate of LLC is increases drastically. Moreover, proposed policy uses 2-bit saturating counters to improve the performance. According to our simulation results, the proposed method can improve hit rates by 9.23% and reduce the access time by 12.85% compared to the conventional method.

A Modified LRU Page Replacement Policy with LMF for Web Proxy Cache (LMF로 수정된 웹 프락시 캐쉬용 LRU페이지 교체 정책)

  • 이용임;김주균
    • Journal of KIISE:Computer Systems and Theory
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    • v.30 no.7_8
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    • pp.426-433
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    • 2003
  • Management policies of Web Proxy Cache, for the QoS of Web users, are mainly focused on the page replacement and the data consistency policy. But the two subjects have been studied independently to each other regardless of its possibility of cooperation. In this paper, we introduce the performance improvement obtained by adapting the characteristic of LMF used in data consistency policy to LRU, thus taking the better performance synergy as a result of complementary cooperation. Various policies for the management of Web Proxy Cache are in progress, this study can be a way of performance guide to increase cache hit ratio and reduce the transmission overhead of Web Server.

Cache Architecture Design for the Performance Improvement of OpenRISC Core (OpenRISC 코어의 성능향상을 위한 캐쉬 구조 설계)

  • Jung, Hong-Kyun;Ryoo, Kwang-Ki
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.1
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    • pp.68-75
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    • 2009
  • As the recent performance of microprocessor is improving quickly, the necessity of cache is growing because of the increase of the access time of main memory. Every block of direct-mapped cache maps to one cache line. Although the mapping rule is simple, if different blocks map to one cache line, the miss ratio will be higher than the set-associative cache due to conflicts. In this paper, for the improvement of the direct-mapped cache of OpenRISC, 4-way set-associative cache is proposed. Four blocks of the main memory of the proposed cache map to one cache line so that the miss ratio is less than the direct-mapped cache. Pseudo-LRU Policy, which is one of the Line Replacement Policies, is used for decreasing the number of bits that store LRU value. The OpenRISC core including the 4-way set-associative cache was verified with FPGA emulation. As the result of performance measurement using test program, the performance of the OpenRISC core including the 4-way set-associative cache is higher than the previous one by 50% and the decrease of miss ratio is more than 15%.

Performance and Power Consumption Improvement of Embedded RISC Core (임베디드 RISC 코어의 성능 및 전력 개선)

  • Jung, Hong-Kyun;Ryoo, Kwang-Ki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.2
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    • pp.453-461
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    • 2010
  • This paper presents a branch prediction algorithm and a 4-way set-associative cache for performance improvement of embedded RISC core and a clock-gating algorithm using ODC (Observability Don't Care) operation to improve the power consumption of the core. The branch prediction algorithm has a structure using BTB(Branch Target Buffer) and 4-way set associative cache has lower miss rate than direct-mapped cache. Pseudo-LRU Policy, which is one of the Line Replacement Policies, is used for decreasing the number of bits that store LRU value. The clock gating algorithm reduces dynamic power consumption. As a result of estimation of performance and dynamic power, the performance of the OpenRISC core applied the proposed architecture is improved about 29% and dynamic power of the core using Chartered $0.18{\mu}m$ technology library is reduced by 16%.

A Caching Mechanism for Knowledge Maps (지식 맵을 위한 캐슁 기법)

  • 정준원;민경섭;김형주
    • Journal of KIISE:Computing Practices and Letters
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    • v.10 no.3
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    • pp.282-291
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    • 2004
  • There has been many researches in TopicMap and RDF which are approach to handle data efficiently with metadata. However, No researches has been performed to service and implement except for presentation and description. In this paper, We suggest the caching mechanism to support an efficient access of knowledgemap and practical knowledgemap service with implementation of TopicMap system. First, We propose a method to navigate Knowledgemap efficiently that includes advantage of former methods. Then, To transmit TopicMap efficiently, We suggest caching mechanism for knowledgemap. This method is that user will be able to navigate knowledgemap efficiently in the viewpoint of human, not application. Therefor the mechanism doesn't cash topics by logical or physical locality but clustering by information and characteristic value of TopicMap. Lastly, we suggest replace mechanism by using graph structure of TopicMap for efficiency of transmission.

Performance Evaluation of Disk Replacement Algorithms in a Shared Cluster (공유 디스크 클러스터에서 버퍼 고체 알고리즘의 성능 평가)

  • Cho, Haeng-Rae
    • Journal of KIISE:Databases
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    • v.35 no.6
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    • pp.469-480
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    • 2008
  • A shared disk (SD) cluster couples multiple nodes for high performance transaction processing, and all the coupled nodes share a common database at the disk level. To reduce the number of disk accesses, each node caches database pages in its memory buffer. Since a particular page may be cached simultaneously in different nodes, cache consistency should be maintained to ensure that nodes can always access the most recent version of database pages. Most cache consistency schemes proposed in the SD cluster adopted LRU as a buffer replacement algorithm. In this paper, we first present four buffer replacement algorithms that consider the characteristics of the SD cluster. Then we compare the performance of the buffer replacement algorithms. We perform the experiments on a variety of cluster configurations and database workloads. The experiment results show that the proposed algorithms achieve performance improvement up to 5 times of LRU algorithm.