• Title, Summary, Keyword: ARIA

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Implementation and Analysis Performance of CCM, GCM based ARIA Block CIpher for Korea CMVP. (KCMVP를 위한 MICOM 환경에서의 ARIA-CCM, ARIA-GCM 구현 및 성능분석 비교)

  • Lee, Jae-Hoon;Park, Minha;Hwang, Nu-Ri;Yi, Okyeon;Kim, Kiheon
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • pp.267-270
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    • 2014
  • As Smart Device research processes, the needs of information security in light devices is increasing. For example, Zigbee provide Information Security by applying $AES-CCM^*$ defined IEEE 802.15.4 standard. However, according to information security law in Korea, only devices with KCMVP certification can be used in government organization and facilities. Therefore, this paper provide a solution to apply ARIA-CCM and ARIA-GCM for KCMVP in reserved field of IEEE 802.15.4 standard. For analyzing performance, we provide the speed test result of ARIA-CCM and ARIA-GCM comparing with $AES-CCM^*$.

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Multidimensional Differential-Linear Cryptanalysis of ARIA Block Cipher

  • Yi, Wentan;Ren, Jiongjiong;Chen, Shaozhen
    • ETRI Journal
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    • v.39 no.1
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    • pp.108-115
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    • 2017
  • ARIA is a 128-bit block cipher that has been selected as a Korean encryption standard. Similar to AES, it is robust against differential cryptanalysis and linear cryptanalysis. In this study, we analyze the security of ARIA against differential-linear cryptanalysis. We present five rounds of differential-linear distinguishers for ARIA, which can distinguish five rounds of ARIA from random permutations using only 284.8 chosen plaintexts. Moreover, we develop differential-linear attacks based on six rounds of ARIA-128 and seven rounds of ARIA-256. This is the first multidimensional differential-linear cryptanalysis of ARIA and it has lower data complexity than all previous results. This is a preliminary study and further research may obtain better results in the future.

Improved Impossible Differential Attack on 7-round Reduced ARIA-256

  • Shen, Xuan;He, Jun
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.13 no.11
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    • pp.5773-5784
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    • 2019
  • ARIA is an involutory SPN block cipher. Its block size is 128-bit and the master key sizes are 128/192/256-bit, respectively. Accordingly, they are called ARIA-128/192/256. As we all know, ARIA is a Korean Standard block cipher nowadays. This paper focuses on the security of ARIA against impossible differential attack. We firstly construct a new 4-round impossible differential of ARIA. Furthermore, based on this impossible differential, a new 7-round impossible differential attack on ARIA-256 is proposed in our paper. This attack needs 2118 chosen plaintexts and 2210 7-round encryptions. Comparing with the previous best result, we improve both the data complexity and time complexity. To our knowledge, it is the best impossible differential attack on ARIA-256 so far.

Design and Implementation of ARIA Cryptic Algorithm (ARIA 암호 알고리듬의 하드웨어 설계 및 구현)

  • Park Jinsub;Yun Yeonsang;Kim Young-Dae;Yang Sangwoon;Chang Taejoo;You Younggap
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.4
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    • pp.29-36
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    • 2005
  • This paper presents the first hardware design of ARIA that KSA(Korea Standards Association) decided as the block encryption standard at Dec. 2004. The ARIA cryptographic algorithm has an efficient involution SPN (Substitution Permutation Network) and is immune to known attacks. The proposed ARIA design based on 1 cycle/round include a dual port ROM to reduce a size of circuit md a high speed round key generator with barrel rotator. ARIA design proposed is implemented with Xilinx VirtexE-1600 FPGA. Throughput is 437 Mbps using 1,491 slices and 16 RAM blocks. To demonstrate the ARIA system operation, we developed a security system cyphering video data of communication though Internet. ARIA addresses applications with high-throughput like data storage and internet security protocol (IPSec and TLS) as well as IC cards.

A Secure ARIA implementation resistant to Differential Power Attack using Random Masking Method (랜덤 마스킹 기법을 이용한 DPA 공격에 안전한 ARIA 구현)

  • Yoo Hyung-So;Kim Chang-Kyun;Park Il-Hwan;Moon Sang-Jae;Ha Jae-Cheol
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.16 no.2
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    • pp.129-139
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    • 2006
  • ARIA is a 128-bit block cipher, which became a Korean Standard in 2004. According to recent research this cipher is attacked by first order DPA attack In this paper, we explain a masking technique that is a countermeasure against first order DPA attack and apply it to the ARIA. And we implemented a masked ARIA for the 8 bit microprocessor based on AVR in software. By using this countermeasure, we verified that it is secure against first order DPA attack.

Differential Fault Analysis on Block Cipher ARIA-128 (블록 암호 ARIA-128에 대한 차분 오류 공격)

  • Park, Se-Hyun;Jeong, Ki-Tae;Lee, Yu-Seop;Sung, Jae-Chul;Hong, Seok-Hie
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.21 no.5
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    • pp.15-25
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    • 2011
  • A differential fault analysis(DFA) is one of the most important side channel attacks on block ciphers. Most block ciphers, such as DES, AES, ARIA, SEED and so on., have been analysed by this attack. In 2008, Wei et al. proposed the first DFA on ARIA-128. Their attack can recover the 128-bit secrey key by about 45 faulty ciphertexts. In this paper, we propose an improved DFA on ARIA-128. We can recover the 12S-bit secret key by only 4 faulty ciphertexts with the computational complexity of O($2^{32}$).

Zero-Correlation Linear Cryptanalysis of Reduced Round ARIA with Partial-sum and FFT

  • Yi, Wen-Tan;Chen, Shao-Zhen;Wei, Kuan-Yang
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.9 no.1
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    • pp.280-295
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    • 2015
  • Block cipher ARIA was first proposed by some South Korean experts in 2003, and later, it was established as a Korean Standard block cipher algorithm by Korean Agency for Technology and Standards. In this paper, we focus on the security evaluation of ARIA block cipher against the recent zero-correlation linear cryptanalysis. In addition, Partial-sum technique and FFT (Fast Fourier Transform) technique are used to speed up the cryptanalysis, respectively. We first introduce some 4-round linear approximations of ARIA with zero-correlation, and then present some key-recovery attacks on 6/7-round ARIA-128/256 with the Partial-sum technique and FFT technique. The key-recovery attack with Partial-sum technique on 6-round ARIA-128 needs $2^{123.6}$ known plaintexts (KPs), $2^{121}$ encryptions and $2^{90.3}$ bytes memory, and the attack with FFT technique requires $2^{124.1}$ KPs, $2^{121.5}$ encryptions and $2^{90.3}$ bytes memory. Moreover, applying Partial-sum technique, we can attack 7-round ARIA-256 with $2^{124.6}$ KPs, $2^{203.5}$ encryptions and $2^{152}$ bytes memory and 7-round ARIA-256 employing FFT technique, requires $2^{124.7}$ KPs, $2^{209.5}$ encryptions and $2^{152}$ bytes memory. Our results are the first zero-correlation linear cryptanalysis results on ARIA.

Design of Optimized ARIA Crypto-Processor Using Composite Field S-Box (합성체 S-Box 기반 최적의 ARIA 암호프로세서 설계)

  • Kang, Min Sup
    • KIPS Transactions on Computer and Communication Systems
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    • v.8 no.11
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    • pp.271-276
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    • 2019
  • Conventional ARIA algorithm which is used LUT based-S-Box is fast the processing speed. However, the algorithm is hard to applied to small portable devices. This paper proposes the hardware design of optimized ARIA crypto-processor based on the modified composite field S-Box in order to decrease its hardware area. The Key scheduling in ARIA algorithm, both diffusion and substitution layers are repeatedly used in each round function. In this approach, an advanced key scheduling method is also presented of which two functions are merged into only one function for reducing hardware overhead in scheduling process. The designed ARIA crypto-processor is described in Verilog-HDL, and then a logic synthesis is also performed by using Xilinx ISE 14.7 tool with target the Xilnx FPGA XC3S1500 device. In order to verify the function of the crypto-processor, both logic and timing simulation are also performed by using simulator called ModelSim 10.4a.

Multiple Impossible Differential Cryptanalysis of Block Cipher CLEFIA and ARIA (CLEFIA와 ARIA 블록 암호에 대한 다중불능차분공격)

  • Choi, Joon-Geun;Kim, Jong-Sung;Sung, Jae-Chul;Hong, Seok-Hie
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.19 no.1
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    • pp.13-24
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    • 2009
  • CLEFIA is a 128-bit block cipher which is proposed by SONY corporation and ARIA is a 128-bit block cipher which is selected as a standard cryptographic primitive. In this paper, we introduce new multiple impossible differential cryptanalysis and apply it to CLEFIA using 9-round impossible differentials proposed in [7], and apply it to ARIA using 4-round impossible differentials proposed in [11]. Our cryptanalytic results on CLEFIA and ARIA are better than previous impossible differential attacks.

FPGA Implementation of ARIA Encryption/Decrytion Core Supporting Four Modes of Operation (4가지 운영모드를 지원하는 ARIA 암호/복호 코어의 FPGA 구현)

  • Kim, Dong-Hyeon;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • pp.237-240
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    • 2012
  • This paper describes an implementation of ARIA crypto algorithm which is a KS (Korea Standards) block cipher algorithm. The ARIA crypto-core supports three master key lengths of 128/192/256-bit specified in the standard and the four modes of operation including ECB, CBC, CTR and OFB. To reduce hardware complexity, a hardware sharing is employed, which shares round function in encryption/decryption module with key initialization module. The ARIA crypto-core is verified by FPGA implementation, the estimated throughput is about 1.07 Gbps at 167 MHz.

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