• Title, Summary, Keyword: Multiplicative inverse over GF($2^{m}$)

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Low-latency Montgomery AB2 Multiplier Using Redundant Representation Over GF(2m)) (GF(2m) 상의 여분 표현을 이용한 낮은 지연시간의 몽고메리 AB2 곱셈기)

  • Kim, Tai Wan;Kim, Kee-Won
    • IEMEK Journal of Embedded Systems and Applications
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    • v.12 no.1
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    • pp.11-18
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    • 2017
  • Finite field arithmetic has been extensively used in error correcting codes and cryptography. Low-complexity and high-speed designs for finite field arithmetic are needed to meet the demands of wider bandwidth, better security and higher portability for personal communication device. In particular, cryptosystems in GF($2^m$) usually require computing exponentiation, division, and multiplicative inverse, which are very costly operations. These operations can be performed by computing modular AB multiplications or modular $AB^2$ multiplications. To compute these time-consuming operations, using $AB^2$ multiplications is more efficient than AB multiplications. Thus, there are needs for an efficient $AB^2$ multiplier architecture. In this paper, we propose a low latency Montgomery $AB^2$ multiplier using redundant representation over GF($2^m$). The proposed $AB^2$ multiplier has less space and time complexities compared to related multipliers. As compared to the corresponding existing structures, the proposed $AB^2$ multiplier saves at least 18% area, 50% time, and 59% area-time (AT) complexity. Accordingly, it is well suited for VLSI implementation and can be easily applied as a basic component for computing complex operations over finite field, such as exponentiation, division, and multiplicative inverse.

Design of Variable Arithmetic Operation Systems for Computing Multiplications and Mulitplicative Inverses in $GF(2^m)$) ($GF(2^m)$ 상의 승법과 승법력 계산을 위한 가변형 산술 연산 시스템의 설계)

  • 박동영;강성수;김흥수
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.5
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    • pp.528-535
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    • 1988
  • This paper presents a constructing theory of variable arithmetic operation systems for computing multiplications and multiplicative inverse in GF(2**m) based on a modulo operation of degree on elements in Galois fields. The proposed multiplier is composed of a zero element control part, input element conversion part, inversion circuit, and output element conversion part. These systems can reduce reasonable circuit areas due to the common use of input/output element converison parts, and the PLA and module structure provice a variable property capable of convertible uses as arithmetic operation systems over different finite fields. This type of designs gives simple, regular, expandable, and concurrent properties suitable for VLSI implementation. Expecially, the multiplicative inverse circuit proposed here is expected to offer a characteristics of the high operation speed than conventional method.

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The Optimal Normal Elements for Massey-Omura Multiplier (Massey-Omura 승산기를 위한 최적 정규원소)

  • 김창규
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.14 no.3
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    • pp.41-48
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    • 2004
  • Finite field multiplication and division are important arithmetic operation in error-correcting codes and cryptosystems. The elements of the finite field GF($2^m$) are represented by bases with a primitive polynomial of degree m over GF(2). We can be easily realized for multiplication or computing multiplicative inverse in GF($2^m$) based on a normal basis representation. The number of product terms of logic function determines a complexity of the Messay-Omura multiplier. A normal basis exists for every finite field. It is not easy to find the optimal normal element for a given primitive polynomial. In this paper, the generating method of normal basis is investigated. The normal bases whose product terms are less than other bases for multiplication in GF($2^m$) are found. For each primitive polynomial, a list of normal elements and number of product terms are presented.

A Hardware Implementation of the Underlying Field Arithmetic Processor based on Optimized Unit Operation Components for Elliptic Curve Cryptosystems (타원곡선을 암호시스템에 사용되는 최적단위 연산항을 기반으로 한 기저체 연산기의 하드웨어 구현)

  • Jo, Seong-Je;Kwon, Yong-Jin
    • Journal of KIISE:Computing Practices and Letters
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    • v.8 no.1
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    • pp.88-95
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    • 2002
  • In recent years, the security of hardware and software systems is one of the most essential factor of our safe network community. As elliptic Curve Cryptosystems proposed by N. Koblitz and V. Miller independently in 1985, require fewer bits for the same security as the existing cryptosystems, for example RSA, there is a net reduction in cost size, and time. In this thesis, we propose an efficient hardware architecture of underlying field arithmetic processor for Elliptic Curve Cryptosystems, and a very useful method for implementing the architecture, especially multiplicative inverse operator over GF$GF (2^m)$ onto FPGA and futhermore VLSI, where the method is based on optimized unit operation components. We optimize the arithmetic processor for speed so that it has a resonable number of gates to implement. The proposed architecture could be applied to any finite field $F_{2m}$. According to the simulation result, though the number of gates are increased by a factor of 8.8, the multiplication speed We optimize the arithmetic processor for speed so that it has a resonable number of gates to implement. The proposed architecture could be applied to any finite field $F_{2m}$. According to the simulation result, though the number of gates are increased by a factor of 8.8, the multiplication speed and inversion speed has been improved 150 times, 480 times respectively compared with the thesis presented by Sarwono Sutikno et al. [7]. The designed underlying arithmetic processor can be also applied for implementing other crypto-processor and various finite field applications.