• Title/Summary/Keyword: Nand flash memory

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A Study of HDD Performance Improvement through Filter Driver & NAND FLASH Memory (Filter Driver 와 NAND FLASH Memory를 이용한 HDD 장치의 성능 개선에 관한 연구)

  • Kim, Jae-Kyung;Kim, Woo-Gil;Kim, Young-Kil
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.8
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    • pp.1635-1641
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    • 2011
  • In this paper, we research the method for HDD I/O Performance improvement by Filter Driver & NAND FLASH Memory. This paper was started from NAND Flash Memory can not be replaced by HDD because of high cost. So We consider that using NAND Flash Memory as cache for HDD. It can be achieved high HDD Performance through Filter Driver by low cost.

Analysis of Potential Risks for Garbage Collection and Wear Leveling Interference in FTL-based NAND Flash Memory

  • Kim, Sungho;Kwak, Jong Wook
    • Journal of the Korea Society of Computer and Information
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    • v.24 no.3
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    • pp.1-9
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    • 2019
  • This paper presents three potential risks in an environment that simultaneously performs the garbage collection and wear leveling in NAND flash memory. These risks may not only disturb the lifespan improvement of NAND flash memory, but also impose an additional overhead of page migrations. In this paper, we analyze the interference of garbage collection and wear leveling and we also provide two theoretical considerations for lifespan prolongation of NAND flash memory. To prove two solutions of three risks, we construct a simulation, based on DiskSim 4.0 and confirm realistic impacts of three risks in NAND flash memory. In experimental results, we found negative impacts of three risks and confirmed the necessity for a coordinator module between garbage collection and wear leveling for reducing the overhead and prolonging the lifespan of NAND flash memory.

Analysis on the Effectiveness of the Filter Buffer for Low Power NAND Flash Memory (저전력 NAND 플래시 메모리를 위한 필터 버퍼의 효율성 분석)

  • Jung, Bo-Sung;Lee, Jung-Hoon
    • IEMEK Journal of Embedded Systems and Applications
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    • v.7 no.4
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    • pp.201-207
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    • 2012
  • Currently, NAND Flash memory has been widely used in consumer storage devices due to its non-volatility, stability, economical feasibility, low power usage, durability, and high density. However, a high capacity of NAND flash memory causes the high power consumption and the low performance. In the convention memory research, a hierarchical filter mechanism can archive an effective performance improvement in terms of the power consumption. In order to attain the best filter structure for NAND flash memory, we selected a direct-mapped filter, a victim filter, a fully associative filter and a 4-way set associative filter for comparison in the performance analysis. According to the results of the simulation, the fully associative filter buffer with a 128byte fetching size can obtain the bet performance compared to another filter structures, and it can reduce the energy*delay product(EDP) by about 93% compared to the conventional NAND Flash memory.

The Verification of Channel Potential using SPICE in 3D NAND Flash Memory (SPICE를 사용한 3D NAND Flash Memory의 Channel Potential 검증)

  • Kim, Hyunju;Kang, Myounggon
    • Journal of IKEEE
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    • v.25 no.4
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    • pp.778-781
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    • 2021
  • In this paper, we propose the 16-layer 3D NAND Flash memory compact modeling using SPICE. In the same structure and simulation conditions, the channel potential about Down Coupling Phenomenon(DCP) and Natural Local Self Boosting (NLSB) were simulated and analyzed with Technology Computer Aided Design(TCAD) tool Atlas(SilvacoTM) and SPICE, respectively. As a result, it was confirmed that the channel potential of TCAD and SPICE for the two phenomena were almost same. The SPICE can be checked the device structure intuitively by using netlist. Also, its simulation time is shorter than TCAD. Therefore, using SPICE can be expected to efficient research on 3D NAND Flash memory.

The buffer Management system for reducing write/erase operations in NAND flash memory (NAND 플래시 메모리에서 쓰기/지우기 연산을 줄이기위한 버퍼 관리 시스템)

  • Jung, Bo-Sung;Lee, Jung-Hoon
    • Journal of the Korea Society of Computer and Information
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    • v.16 no.10
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    • pp.1-10
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    • 2011
  • There are the large overhead of block erase and page write operations in NAND flash memory, though it has low power consumption, cheap prices and a large storage. Due to the physical characteristics of NAND flash memory, overwrite operations are not permitted at the same location, so rewriting operation require after erase operation. it cause performance decrease of NAND flash memory. Using SRAM buffer in traditional NAND flash memory, it can not only reduce effective write operation but also guarantee fast memory access time. In this paper, we proposed the small SRAM buffer management system for reducing overhead of NAND flash memory, that is, erase and write operations. The proposed buffer system in a NAND flash memory consists of two parts, i.e., a fully associative temporal buffer with the small fetching block size and a fully associative spatial buffer with the large fetching block size. The temporal buffer have small fetching blocks that referenced from spatial buffer. When it happen write operations or erase operations in NAND flash memory, the related fetching blocks in temporal buffer include a page or a block are written in NAND flash memory at the same time. The writing and erasing counts in NAND flash memory can be reduced. According to the simulation results, although we have high miss ratios, write and erase operations can be reduced approximatively 58% and 83% respectively. Also the average memory access times are improved about 84% compared with the fully associative buffer with two sizes.

A Fast Mount and Stability Scheme for a NAND Flash Memory-based File System (NAND 플래시 메모리 기반 파일 시스템을 위한 빠른 마운트 및 안정성 기법)

  • Park, Sang-Oh;Kim, Sung-Jo
    • Journal of KIISE:Computer Systems and Theory
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    • v.34 no.12
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    • pp.683-695
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    • 2007
  • NAND flash memory-based file systems cannot store their system-related information in the file system due to wear-leveling of NAND flash memory. This forces NAND flash memory-based file systems to scan the whole flash memory during their mounts. The mount time usually increases linearly according to the size of and the usage pattern of the flash memory. NAND flash memory has been widely used as the storage medium of mobile devices. Due to the fact that mobile devices have unstable power supply, the file system for NAND flash memory requires stable recovery mechanism from power failure. In this paper, we present design and implementation of a new NAND flash memory-based file system that provides fast mount and enhanced stability. Our file system mounts 19 times faster than JFFS2's and 2 times faster than YAFFS's. The stability of our file system is also shown to be equivalent to that of JFFS2.

A Study of HDD Performance Improvement through Filter Driver & NAND FLASH Memory (Filter Driver 와 NAND FLASH Memory를 이용한 HDD 장치의 성능 개선에 관한 연구)

  • Kim, Woo-Gil;Kim, Young-Kil
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.10a
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    • pp.58-61
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    • 2010
  • In this paper, we research the method for HDD I/O Performance improvement by Filter Driver &NAND FLASH Memory. We analyze the effect of the operation of the Device Driver & NAND FLASH Memory and propose the method for the HDD I/O Performance improvement.

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Time-Aware Wear Leveling by Combining Garbage Collector and Static Wear Leveler for NAND Flash Memory System

  • Hwang, Sang-Ho;Kwak, Jong Wook
    • Journal of the Korea Society of Computer and Information
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    • v.22 no.3
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    • pp.1-8
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    • 2017
  • In this paper, we propose a new hybrid wear leveling technique for NAND Flash memory, called Time-Aware Wear Leveling (TAWL). Our proposal prolongs the lifetime of NAND Flash memory by using dynamic wear leveling technique which considers the wear level of hot blocks as well as static wear leveling technique which considers the wear level of the whole blocks. TAWL also reduces the overhead of garbage collection by separating hot data and cold data using update frequency rate. We showed that TAWL enhanced the lifetime of NAND flash memory up to 220% compared with previous wear leveling techniques and our technique also reduced the number of copy operations of garbage collections by separating hot and cold data up to 45%.

EPET-WL: Enhanced Prediction and Elapsed Time-based Wear Leveling Technique for NAND Flash Memory in Portable Devices

  • Kim, Sung Ho;Kwak, Jong Wook
    • Journal of the Korea Society of Computer and Information
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    • v.21 no.5
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    • pp.1-10
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    • 2016
  • Magnetic disks have been used for decades in auxiliary storage devices of computer systems. In recent years, the use of NAND flash memory, which is called SSD, is increased as auxiliary storage devices. However, NAND flash memory, unlike traditional magnetic disks, necessarily performs the erase operation before the write operation in order to overwrite data and this leads to degrade the system lifetime and performance of overall NAND flash memory system. Moreover, NAND flash memory has the lower endurance, compared to traditional magnetic disks. To overcome this problem, this paper proposes EPET (Enhanced Prediction and Elapsed Time) wear leveling technique, which is especially efficient to portable devices. EPET wear leveling uses the advantage of PET (Prediction of Elapsed Time) wear leveling and solves long-term system failure time problem. Moreover, EPET wear leveling further improves space efficiency. In our experiments, EPET wear leveling prolonged the first bad time up to 328.9% and prolonged the system lifetime up to 305.9%, compared to other techniques.

Block Unit Mapping Technique of NAND Flash Memory Using Variable Offset

  • Lee, Seung-Woo;Ryu, Kwan-Woo
    • Journal of the Korea Society of Computer and Information
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    • v.24 no.8
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    • pp.9-17
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    • 2019
  • In this paper, we propose a block mapping technique applicable to NAND flash memory. In order to use the NAND flash memory with the operating system and the file system developed on the basis of the hard disk which is mainly used in the general PC field, it is necessary to use the system software known as the FTL (Flash Translation Layer). FTL overcomes the disadvantage of not being able to overwrite data by using the address mapping table and solves the additional features caused by the physical structure of NAND flash memory. In this paper, we propose a new mapping method based on the block mapping method for efficient use of the NAND flash memory. In the case of the proposed technique, the data modification operation is processed by using a blank page in the existing block without using an additional block for the data modification operation, thereby minimizing the block unit deletion operation in the merging operation. Also, the frequency of occurrence of the sequential write request and random write request Accordingly, by optimally adjusting the ratio of pages for recording data in a block and pages for recording data requested for modification, it is possible to optimize sequential writing and random writing by maximizing the utilization of pages in a block.