• Title, Summary, Keyword: Packet Processing

Search Result 744, Processing Time 0.046 seconds

Simulation Analysis for Verifying an Implementation Method of Higher-performed Packet Routing

  • Park, Jaewoo;Lim, Seong-Yong;Lee, Kyou-Ho
    • Proceedings of the Korea Society for Simulation Conference
    • /
    • /
    • pp.440-443
    • /
    • 2001
  • As inter-network traffics grows rapidly, the router systems as a network component becomes to be capable of not only wire-speed packet processing but also plentiful programmability for quality services. A network processor technology is widely used to achieve such capabilities in the high-end router. Although providing two such capabilities, the network processor can't support a deep packet processing at nominal wire-speed. Considering QoS may result in performance degradation of processing packet. In order to achieve foster processing, one chipset of network processor is occasionally not enough. Using more than one urges to consider a problem that is, for instance, an out-of-order delivery of packets. This problem can be serious in some applications such as voice over IP and video services, which assume that packets arrive in order. It is required to develop an effective packet processing mechanism leer using more than one network processors in parallel in one linecard unit of the router system. Simulation analysis is also needed for verifying the mechanism. We propose the packet processing mechanism consisting of more than two NPs in parallel. In this mechanism, we use a load-balancing algorithm that distributes the packet traffic load evenly and keeps the sequence, and then verify the algorithm with simulation analysis. As a simulation tool, we use DEVSim++, which is a DEVS formalism-based hierarchical discrete-event simulation environment developed by KAIST. In this paper, we are going to show not only applicability of the DEVS formalism to hardware modeling and simulation but also predictability of performance of the load balancer when implemented with FPGA.

  • PDF

eFlowC: A Packet Processing Language for Network Management (eFlowC : 네트워크 관리를 위한 패킷 처리 언어)

  • Ko, Bang-Won;Yoo, Jae-Woo
    • Journal of the Korea Society of Computer and Information
    • /
    • v.19 no.1
    • /
    • pp.65-76
    • /
    • 2014
  • In this paper, we propose a high-level programming language for packet processing called eFlowC and it supporting programming development environment. Based on the C language which is already familiar and easy to use to program developers, eFlowC maintains the similar syntax and semantics of C. Some features that are unnecessary for the packet processing has been removed from C, eFlowC is highly focused on performing packet data, database, string byte information checking and event processing. Design high-level programming languages and apply an existing language or compiler technology, language function and compilation process that is required for packet processing will be described. In order to use the DPIC device such as X11, we designed a virtual machine eFVM that takes into account the scalability and portability. We have evaluated the utility of the proposed language by experimenting a variety of real application programs with our programming environment such as compiler, simulator and debugger for eFVM. As there is little research that devoted to define the formats, meanings and functions of the packet processing language, this research is significant and expected to be a basis for the packet processing language.

IMT-2000 Packet Data Processing Method utilizing MPLS (MPLS망을 적용한 IMT2000 시스템에서의 패킷 데이터 처리 절차)

  • Yu, Jae-Pil;Kim, Gi-Cheon;Lee, Yun-Ju
    • The Transactions of the Korea Information Processing Society
    • /
    • v.6 no.11S
    • /
    • pp.3190-3198
    • /
    • 1999
  • Because of the rapid growth of the mobile communication, the need for the mobile internet access has grown up as well. since the current mobile communication network, however, is optimized for a voice communication system, which exclusively occupies a channel for a given time, it is not suitable for variable rate packet data. In order to support the mobile internet access, it is essential do design a reasonable packet switching network which supports the mobility. Since mobile packet network has longer latency, high speed switching and QoS are required to meet the user's requirements. In this paper, we suggest an resonable way to construct a network and its operation procedures utilizing GPRS(General Packet Radio Service) network and MPLS(Multi Protocol Label Switching) to provide a high speed switching and QoS mobile internet access. GPRS is used as a network which supports the mobility and MPLS guarantees the QoS and high speed IP protocol transmission based on the ATM switching technology.

  • PDF

On IPv6 Traceback using Deterministic Packet Marking

  • Amin, Syed Obaid;Hong, Choong-Seon;Kim, Il-Joong
    • Proceedings of the Korea Information Processing Society Conference
    • /
    • /
    • pp.977-980
    • /
    • 2005
  • The motivation of IP traceback is to identify the true source of an IP datagram in internet. These techniques now emerging as effective deterrent for current cyber threats, especially (D)DoS. Deterministic Packet Marking (DPM) is one of the algorithm used for IP traceback. This paper elucidates the implementation of deterministic packet marking scheme on IPv6 networks. The proposed scheme is capable of single packet traceback. We also examined the issues regarding IPv6 header and show that this scheme is practical, scalable, efficient and can be implemented on existing IPv6 networks easily.

  • PDF

A High Speed IP Packet Forwarding Engine of ATM based Label Edge Routers for POS Interface (POS 정합을 위한 ATM 기반 레이블 에지 라우터의 고속 IP 패킷 포워딩 엔진)

  • 최병철;곽동용;이정태
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.27 no.11C
    • /
    • pp.1171-1177
    • /
    • 2002
  • In this paper, we proposed a high speed IP(Internet Protocol) packet forwarding engine of ATM(Asynchronous Transfer Mode) based label edge routers for POS(Packet over SONET) interface. The forwarding engine uses TCAM(Ternary Content Addressable Memory) for high performance lookup processing of the packet received from POS interface. We have accomplished high speed IP packet forwarding in hardware by implementing the functions of high speed IP header Processing and lookup control into FPGA(Field Programmable Gate Array). The proposed forwarding engine has the functions of label edge routers as the lookup controller supports MPLS(Multiprotocol Label Switching) packet processing functionality.

A Study of Performance Enhancement in Hierarchical Mobile IPv6 using Fast-Handoff

  • Kim, Hong-Sik;Kim, Hyun-Yong;Jung, Joseph;Song, Joo-Seok
    • Proceedings of the Korea Information Processing Society Conference
    • /
    • /
    • pp.1417-1420
    • /
    • 2004
  • The combination of Fast-Handoff and Hierarchical Mobile IPv6 (F-HMIPv6) allows the anticipation of the layer3 handoff such that data traffic can be efficiently redirected to the mobile node's new location before it moves there. However, after moving to the new Access Router (NAR), if the mobile node (MN) sends the Local Binding Update (LBU) to the Mobility Anchor Point (MAP) before receiving all of the buffered packet from the NAR, the MN may receive the general packet from the MAP. That is, the MN may simultaneously receive two types of packet which has different sequence number. These cause the confusion in packet order, and the MN sends the dup ack for the packet retransmission to the CN. It results in the degradation of the TCP performance. Therefore, we propose the scheme for minimizing the out-of-sequence packet in F-HMIPv6.

  • PDF

Self-Localized Packet Forwarding in Wireless Sensor Networks

  • Dubey, Tarun;Sahu, O.P.
    • Journal of Information Processing Systems
    • /
    • v.9 no.3
    • /
    • pp.477-488
    • /
    • 2013
  • Wireless Sensor Networks (WSNs) are comprised of sensor nodes that forward data in the shape of packets inside a network. Proficient packet forwarding is a prerequisite in sensor networks since many tasks in the network, together with redundancy evaluation and localization, depend upon the methods of packet forwarding. With the motivation to develop a fault tolerant packet forwarding scheme a Self-Localized Packet Forwarding Algorithm (SLPFA) to control redundancy in WSNs is proposed in this paper. The proposed algorithm infuses the aspects of the gossip protocol for forwarding packets and the end to end performance of the proposed algorithm is evaluated for different values of node densities in the same deployment area by means of simulations.

Implementation and Performance Analysis of Efficient Packet Processing Method For DPI (Deep Packet Inspection) System using Dual-Processors (듀얼 프로세서 기반 DPI (Deep Packet Inspection) 엔진을 위한 효율적 패킷 프로세싱 방안 구현 및 성능 분석)

  • Yang, Joon-Ho;Han, Seung-Jae
    • The KIPS Transactions:PartC
    • /
    • v.16C no.4
    • /
    • pp.417-422
    • /
    • 2009
  • Implementation of DPI(Deep Packet Inspection) system on a general purpose multiprocessor platform is an attractive option from the implementation cost point of view, since it does not require high-cost customized hardware. Load balancing has been considered as a primary means to achieve high performance in multi processor systems. We claim, however, that in case of DPI system design simply balancing the load of each processor does not necessarily yield the highest system performance. Instead, we propose a method in which tasks are allocated to processors based on their functions. We implemented the proposed method in dual processor Linux system and compare its performance with the existing load balancing methods. Under the proposed method, one processor is dedicated to deal with interrupt handling and generic packet processing, while another processor is dedicated to DPI processing. According to experimental results, the proposed scheme outperforms the existing schemes by 60%, mainly because of the reduction of cache miss and spin lock occurrences.

Performance Analysis of Forwarding Engine in MPLS Network (MPLS 망에서의 포워딩 엔진에 대한 성능 분석)

  • Lee, Jae-Seop;Ryu, Ho-Young;Im, Jun-Mook;Suh, Jae-Joon
    • IE interfaces
    • /
    • v.14 no.3
    • /
    • pp.263-271
    • /
    • 2001
  • MPLS LER is located at the boundary of MPLS domain as an ingress or an egress router and plays a role in connecting with the existing Internet. Among the components of the MPLS LER, forwarding engine(FE) is a key device which assigns a label to an IP packet by analyzing the destination address of its header in order to enter the MPLS domain, or restructures the cells from MPLS domain into IP packet by reversely processing. In this paper, we investigate the design of FE by analyzing the traffic performance of its components and estimate the IP packet processing capacity of a FE using queueing model and simulation. It is found that the maximum IP packet processing capacity of the Forwarding Engine is about 150,000 packets/sec.

  • PDF

Cross-Product Algorithm Implementation and Performance Evaluation for Packet Classification (Packet Classification을 위한 Cross-Product 알고리즘 구현과 성능평가)

  • Kang, Kil-Soo;Choi, Kyung-Hee;Jung, Gi-Hyun
    • Proceedings of the Korea Information Processing Society Conference
    • /
    • /
    • pp.1077-1080
    • /
    • 2003
  • 본 연구는 룰들의 각 필드들을 index하여 곱한 cross-product 테이블을 이용한 packet classification 알고리즘에 대해 연구하고 그 것의 성능을 평가하고 분석한다. 현재 Packet Classification은 Packet Filtering, Policy Routing, Accounting & Billing, Traffic Rate Limiting, Traffic Shaping, 등등의 서비스를 위한 가장 핵심적인 작업이다. 그러나 이들을 빠르게 서비스하는 알고리즘은 아직 존재하지 않는다. 단지 하드웨어 TCAM 을 이용해서 작은 룰들에 대한 처리만이 어느 정도 가능한 실정이다. 이에 본 연구는 소프트웨어를 이용한 cross-product 알고리즘의 효용성을 가늠하고자 연구하고 이를 실제 구현해 평가하고자 한다.

  • PDF