• Title, Summary, Keyword: annealing

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Analysis of electrical properties of two-step annealed polycrystalline silicon thin film transistors (두 단계 열처리에 의해 제작된 다결정 실리콘 박막트랜지스터의 전기적 특성의 분석)

  • 최권영;한민구;김용상
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.45 no.4
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    • pp.568-573
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    • 1996
  • The amorphous silicon films deposited by low pressure chemical vapor deposition are crystallized by the various annealing techniques including low-temperature furnace annealing and two-step annealing. Two-step annealing is the combination of furnace annealing at 600 [.deg. C] for 24 h and the sequential furnace annealing at 950 [.deg. C] 1h or the excimer laser annealing. It s found that two-step annealings reduce the in-grain defects significantly without changing the grain boundary structure. The performance of the poly-Si thin film transistors (TFTs) produced by employing the tow-step annealing has been improved significantly compared with those of one-step annealing. (author). 13 refs., 6 figs., 1 tab.

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Effects of the buffer layer annealing and post annealing temperature on the structural and optical properties of ZnO nanorods grown by a hydrothermal synthesis

  • Sin, Chang-Mi;Ryu, Hyeok-Hyeon;Lee, Jae-Yeop;Heo, Ju-Hoe;Park, Ju-Hyeon;Lee, Tae-Min;Choe, Sin-Ho;Fei, Han Qi
    • Proceedings of the Materials Research Society of Korea Conference
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    • pp.24.1-24.1
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    • 2009
  • The zinc oxide (ZnO) material as the II-VI compound semiconductor is useful in various fields of device applications such as light-emitting diodes (LEDs), solar cells and gas sensors due to its wide direct band gap of 3.37eV and high exciton binding energy of 60meV at room temperature. In this study, the ZnO nanorods were deposited onto homogenous buffer layer/Si(100) substrates by a hydrothermal synthesis. The Effects of the buffer layer annealing and post annealing temperature on the structural and optical properties of ZnO nanorods grown by a hydrothermal synthesis were investigated. For the buffer layer annealing case, the annealed buffer layer surface became rougher with increasing of annealing temperature up to $750^{\circ}C$, while it was smoothed with more increasing of annealing temperature due to the evaporation of buffer layer. It was found that the roughest surface of buffer layer improved the structural and optical properties of ZnO nanorods. For the post annealing case, the hydrothermally grown ZnO nanorods were annealed with various temperatures ranging from 450 to $900^{\circ}C$. Similarly in the buffer layer annealing case, the post annealing enhanced the properties of ZnO nanorods with increasing of annealing temperature up to $750^{\circ}C$. However, it was degraded with further increasing of annealing temperature due to the violent movement of atoms and evaporation. Finally, the buffer layer annealing and post annealing treatment could efficiently improve the properties of hydrothermally grown ZnO nanorods. The morphology and structural properties of ZnO nanorods grown by the hydrothermal synthesis were measured by atomic force microscopy (AFM), field emission scanning electron microscopy (SEM), and x-ray diffraction (XRD). The optical properties were also analyzed by photoluminescence (PL) measurement.

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Direct Bonding of Heterogeneous Insulator Silicon Pairs using Various Annealing Method (열처리 방법에 따른 이종절연층 실리콘 기판쌍의 직접접합)

  • 송오성;이기영
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.10
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    • pp.859-864
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    • 2003
  • We prepared SOI(silicon-on-insulator) wafer pairs of Si II SiO$_2$/Si$_3$N$_4$ II Si using wafer direct bonding with an electric furnace annealing(EFA), a fast linear annealing(FLA), and a rapid thermal annealing(RTA), respectively, by varying the annealing temperatures at a given annealing process. We measured the bonding area and the bonding strength with processes. EFA and FLA showed almost identical bonding area and theoretical bonding strength at the elevated temperature. RTA was not bonded at all due to warpage, We report that FLA process was superior to other annealing processes in aspects of surface temperature, annealing time, and bonding strength.

The Effects of Annealing on Resistant Starch Contents of Cross-linked Maize Starches (Annealing 처리가 가교결합 옥수수전분의 저항전분 수율에 미치는 영향)

  • Mun, Sae-Hun;Shin, Mal-Shick
    • Korean Journal of Food Science and Technology
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    • v.34 no.3
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    • pp.431-436
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    • 2002
  • To develop a method for increasing RS level in maize starch, cross-linked resistant starches treated with annealing were prepared. Maize starch and amylomaize VII were used in the study and annealed at $40{\sim}60^{\circ}C$ before cross-linking modification. To compare effect of annealing below gelatinization temperature, starches were heat treated at 70 and $100^{\circ}C$. RS contents were assayed by pancreatin-gravimetric (P/G) method. When maize starch and amylomaize VII were cross-linked at $45^{\circ}C$ and pH 11.0 by slurrying the starch on a solution of STMP(sodium trimetaphosphate), STPP(sodium tripolyphosphate), and sodium sulfate, RS content was 14.7% and 45.3%, respectively. Annealing below gelatinization temperature before cross-linking increased RS contents of prepared cross-linked starches but did not affect the swelling power. Heat treatment above gelatinization temperature increased the swelling power of cross-linked starch prepared from maize starch. The characteristics by X-ray diffractometry and scanning electron microscopy of cross-linked resistant starch were not changed by annealing.

Stress Evolution with Annealing Methods in SOI Wafer Pairs (열처리 방법에 따른 SOI 기판의 스트레스변화)

  • Seo, Tae-Yune;Lee, Sang-Hyun;Song, Oh-Sung
    • Korean Journal of Materials Research
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    • v.12 no.10
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    • pp.820-824
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    • 2002
  • It is of importance to know that the bonding strength and interfacial stress of SOI wafer pairs to meet with mechanical and thermal stresses during process. We fabricated Si/2000$\AA$-SiO$_2$ ∥ 2000$\AA$-SiO$_2$/Si SOI wafer pairs with electric furnace annealing, rapid thermal annealing (RTA), and fast linear annealing (FLA), respectively, by varying the annealing temperatures at a given annealing process. Bonding strength and interfacial stress were measured by a razor blade crack opening method and a laser curvature characterization method, respectively. All the annealing process induced the tensile thermal stresses. Electrical furnace annealing achieved the maximum bonding strength at $1000^{\circ}C$-2 hr anneal, while it produced constant thermal tensile stress by $1000^{\circ}C$. RTA showed very small bonding strength due to premating failure during annealing. FLA showed enough bonding strength at $500^{\circ}C$, however large thermal tensile stress were induced. We confirmed that premated wafer pairs should have appropriate compressive interfacial stress to compensate the thermal tensile stress during a given annealing process.

Residual Stress Variation by Isothermal and Isochronal Annealing in Cold Rolled Alloy 600 (냉간 압연된 Alloy 600에서 등온 및 등시 소둔에 의한 잔류응력의 변화)

  • Kim, Sung Soo;Park, Duck Geun;Cheong, Young Moo
    • Korean Journal of Metals and Materials
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    • v.49 no.6
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    • pp.462-467
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    • 2011
  • In order to understand why annealing at $480^{\circ}C$ for several hour prevents the initiation of PWSCC, the residual stress variation with isothermal annealing at $480^{\circ}C$ and isochronal annealing between 480 and $800^{\circ}C$ in cold rolled Alloy 600 was investigated by the XRD method. The isothermal annealing decreased residual stress slightly in the rolling direction but not in the transverse direction, whereas the isochronal annealing for two hours increased residual stress. It seemed that the decrease in residual stress by isothermal annealing was due to lattice contraction by an ordering reaction because the isothermal annealing increased hardness. The effects of the isochronal annealing could be interpreted as the influence of thermal expansion and a disordering reaction.

Effect of Annealing Time on Electrical Performance of SiZnSnO Thin Film Transistor Fabricated by RF Magnetron Sputtering

  • Ko, Kyung Min;Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.2
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    • pp.99-102
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    • 2015
  • Thin film transistors (TFTs) with amorphous 2 wt% silicon-doped zinc tin oxide (a-2SZTO) channel layer were fabricated using an RF magnetron sputtering system, and the effect of post-annealing treatment time on the structural and electrical properties of a-2SZTO systems was investigated. It is well known that Si can effectively reduce the generation of oxygen vacancies. However, it is interesting to note that prolonged annealing could have a bad effect on the roughness of a-2SZTO systems, since the roughness of a-2SZTO thin films increases in proportion to the thermal annealing treatment time. Thermal annealing can control the electrical characteristics of amorphous oxide semiconductor (AOS) TFTs. It was observed herein that prolonged annealing treatment can cause bumpy roughness, which led to increase of the contact resistance between the electrode and channel. Thus, it was confirmed that deterioration of the electrical characteristics could occur due to prolonged annealing. The longer annealing time also decreased the field effect mobility. The a-2SZTO TFTs annealed at 500℃ for 2 hours displayed the mobility of 2.17 cm2/Vs. As the electrical characteristics of a-2SZTO annealed at a fixed temperature for long periods were deteriorated, careful optimization of the annealing conditions for a-2SZTO, in terms of time, should be carried out to achieve better performance.

RTA Post-annealing Effect on Poly-Si Thin Film Transistors Fabricated by Metal Induced Lateral Crystallization (금속 유도 측면 결정화를 이용한 박막 트랜지스터의 RTA 후속열처리 효과)

  • 최진영;윤여건;주승기
    • Proceedings of the IEEK Conference
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    • pp.274-277
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    • 2000
  • Thin Film Transistor(TFTs) were fabricated from poly-Si crystallized by a two-step annealing process on glass substrates. The combination of low-temperature(500$^{\circ}C$) Metal-Induced Lateral Crystallization(MILC) furnace annealing and high -temperature (700$^{\circ}C$) rapid thermal annealing leads to the improvement of the material quality The TFTs measured with this two-step annealing material exhibit better characteristics than those obtained by using conventional MILC furnace annealing.

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A Study on the Formability of Autonobile Panel on the Heat Treatment Method (자동차용 강판의 소둔방법에 따른 성형성의 변화에 관한 연구)

  • 김순경;이승수;전언찬
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • pp.629-632
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    • 1995
  • The formability of an automobile body panel is very important. So, we performed an annealing condition change for the development of annealing condition with temperature, atmospheric gas and the annealing cycle. Formability was changed under the influenced of the mechanical properties of steel sheet for the automobile body panel. Therefore, ot os important in the BAF(Batch annealing furnace) annealing process. Because mechanical properties were decided on the heat treatment method of the coil. So, we tested the development of mechanical properties according to the heat treatment method at the annealing furnace using the Ax atmospheric gas and the HNx atmospheric gas. As a result of several investigations, we confirmed the following characteristics ; mechanical properties change under the influence of the annealing cycle and atmospheric gas.

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Fast Simulated Annealing Algorithm (Simulated Annealing의 수렴속도 개선에 관한 연구)

  • 정철곤;김중규
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.3A
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    • pp.284-289
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    • 2002
  • In this paper, we propose the fast simulated annealing algorithm to decrease convergence rate in image segmentation using MRF. Simulated annealing algorithm has a good performance in noisy image or texture image, But there is a problem to have a long convergence rate. To fad a solution to this problem, we have labeled each pixel adaptively according to its intensity before simulated annealing. Then, we show the superiority of proposed method through experimental results.