• Title, Summary, Keyword: cryptographic

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Design of RSA cryptographic circuit for small chip area using refined Montgomery algorithm (개선된 몽고메리 알고리즘을 이용한 저면적용 RSA 암호 회로 설계)

  • 김무섭;최용제;김호원;정교일
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.12 no.5
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    • pp.95-105
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    • 2002
  • This paper describes an efficient method to implement a hardware circuit of RSA public key cryptographic algorithm, which is important to public-key cryptographic system for an authentication, a key exchange and a digital signature. The RSA algorithm needs a modular exponential for its cryptographic operation, and the modular exponential operation is consists of repeated modular multiplication. In a numerous algorithm to compute a modular multiplication, the Montgomery algorithm is one of the most widely used algorithms for its conspicuous efficiency on hardware implementation. Over the past a few decades a considerable number of studies have been conducted on the efficient hardware design of modular multiplication for RSA cryptographic system. But many of those studies focused on the decrease of operating time for its higher performance. The most important thing to design a hardware circuit, which has a limit on a circuit area, is a trade off between a small circuit area and a feasible operating time. For these reasons, we modified the Montgomery algorithm for its efficient hardware structure for a system having a limit in its circuit area and implemented the refined algorithm in the IESA system developed for ETRI's smart card emulating system.

Design of modified Feistel structure for high-capacity and high speed achievement (대용량 고속화 수행을 위한 변형된 Feistel 구조 설계에 관한 연구)

  • Lee Seon-Keun;Jung Woo-Yeol
    • Journal of the Korea Society of Computer and Information
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    • v.10 no.3
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    • pp.183-188
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    • 2005
  • Parallel processing in block cryptographic algorithm is difficult, because Feistel structure that is basis structure of block cryptographic algorithm is sequential processing structure. Therefore this paper changes these sequential processing structure and Feistel structure made parallel processing to be possible. This paper that apply this modified structure designed DES that have parallel Feistel structure. Proposed parallel Feistel structure could prove greatly block cryptographic algorithm's performance such as DES and so on that could not but have trade-off relation the data processing speed and data security interval because block cryptographic algorithm can not use pipeline method because of itself structural problem. Therefore, modified Feistel structure is going to display more superior security function and processing ability of high speed than now in case apply way that is proposed to SEED, AES's Rijndael, Twofish etc. that apply Feistel structure.

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A Study on the MS-WP Cryptographic Processor for Wireless Security Transmission Network among Nodes of Water-Processing Measurement-Control-Equipment (수처리 계측제어설비 노드들 간의 무선 안전 전송을 위한 MS-WP 암호 프로세서에 관한 연구)

  • Lee, Seon-Keun;Yu, Chool;Park, Jong-Deok
    • The Journal of the Korea institute of electronic communication sciences
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    • v.6 no.3
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    • pp.381-387
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    • 2011
  • Measurement controller that acquire and control and observe data from scattering sensors is organic with central control room. Therefore, measurement controller is efficient wireless network than wire network. But, serious problem is happened in security from outside if use wireless network. Therefore, this paper proposed suitable MS-WP cryptographic system to measurement control wireless network to augment network efficiency of measure controller. Result that implement proposed MS-WP cryptographic system by chip level and achieve a simulation, confirmed that 130% processing rate increase and system efficiency are increased double than AES algorithm. Proposed MS-WP cryptographic system augments security and is considered is suitable to measurement controller because that low power is possible and the processing speed is fast.

Evaluation of DES key search stability using Parallel Computing (병렬 컴퓨팅을 이용한 DES 키 탐색 안정성 분석)

  • Yoon, JunWeon;Choi, JangWon;Park, ChanYeol;Kong, Ki-Sik
    • Journal of Digital Contents Society
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    • v.14 no.1
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    • pp.65-72
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    • 2013
  • Current and future parallel computing model has been suggested for running and solving large-scale application problems such as climate, bio, cryptology, and astronomy, etc. Parallel computing is a form of computation in which many calculations are carried out simultaneously. And we are able to shorten the execution time of the program, as well as can extend the scale of the problem that can be solved. In this paper, we perform the actual cryptographic algorithms through parallel processing and evaluate its efficiency. Length of the key, which is stable criterion of cryptographic algorithm, judged according to the amount of complete enumeration computation. So we present a detailed procedure of DES key search cryptographic algorithms for executing of enumeration computation in parallel processing environment. And then, we did the simulation through applying to clustering system. As a result, we can measure the safety and solidity of cryptographic algorithm.

Flexible Crypto System for IoT and Cloud Service (IoT와 클라우드 서비스를 위한 유연한 암호화 시스템)

  • Kim, SeokWoo
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.9 no.1
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    • pp.15-23
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    • 2016
  • As various IoT devices appear recently, Cloud Services such as DropBox, Amazon S3, Microsoft Azure Storage, etc are widely use for data sharing across the devices. Although, cryptographic algorithms like AES is prevalently used for data security, there is no mechanisms to allow selectively and flexibly use wider spectrum of lightweight cryptographic algorithms such as LEA, SEED, ARIA. With this, IoT devices with lower computation power and limited battery life will suffer from overly expensive workload and cryptographic operations are slower than what is enough. In this paper, we designed and implemented a CloudGate that allows client programs of those cloud services to flexibly select a cryptographic algorithms depending on the required security level. By selectively using LEA lightweight algorithms, we could achieve the cryptographic operations could be maximum 1.8 faster and more efficient than using AES.

Application of C Language Based Cryptographic Module with KCMVP in Java Environment (C언어로 개발된 검증필 암호모듈을 자바환경에서 활용하기 위한 방안)

  • Choi, Hyunduk;Lee, Jaehoon;Yi, Okyeon
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • pp.398-401
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    • 2014
  • Due to recent arise of cybercrime, importance of cyber security is highlighted more than ever. Korean government has been running Korea Cryptographic Module Validation Program, namely KCMVP, to validate security level of cryptographic modules for public organizations: indeed, many are achieving the validation. According to the program, operating environments for any specific cryptographic module are fixed. In other words, running validated module in other software environment is strictly prohibited. However, this paper asserts that it is possible for a C language based module to operate in Java based environment as long as the module is running on a validated environment. We expect this paper to help saving great amount of money and time for developing another cryptographic modules for the same operating environment. Also, this method will provide an idea for developing faster modules.

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VLSI Design of Cryptographic Processor for Triple DES and DES Encryption Algorithm (3중 DES와 DES 암호 알고리즘용 암호 프로세서와 VLSI 설계)

  • 정진욱;최병윤
    • Proceedings of the Korea Multimedia Society Conference
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    • pp.117-120
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    • 2000
  • This paper describe VLSL design of crytographic processor which can execute triple DES and DES encryption algorithm. To satisfy flexible architecture and area-efficient structure, the processor has 1 unrolled loop structure without pipeline and can support four standard mode, such as ECB, CBC, CFB, and OFB modes. To reduce overhead of key computation , the key precomputation technique is used. Also to eliminate increase of processing time due to data input and output time, background I/O techniques is used which data input and output operation execute in parallel with encryption operation of cryptographic processor. The cryptographic processor is implemented using Altera EPF10K40RC208-4 devices and has peak performance of about 75 Mbps under 20 Mhz ECB DES mode and 25 Mbps uder 20 Mhz triple DES mode.

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Towards Developing Formal Verification Tools for Cryptographic Protocols (암호프로토콜 논리성 검증도구 개발에 관한 연구)

  • 권태경;김승주;송보연
    • Review of KIISC
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    • v.12 no.2
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    • pp.62-76
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    • 2002
  • Incautiously designed and informally verified cryptographic protocols are error-prone and can allow an adversary to have the ideal starting point for various kinds of attacks. The flaws resulting from these protocols can be subtle and hard to find. Accordingly we need formal methods for systematic design and verification of cryptographic protocols. This paper surveys the state-of-the-art and proposes a practical developing method that will be implemented in the future study.

VLSI Design and Implementation of Inversion and Division over GF($2^m$) for Elliptic Curve Cryptographic System (타원 곡선 암호 프로세서용 GF($2^m$) Inversion, Division 회로 설계 및 구현)

  • 현주대;최병윤
    • Proceedings of the IEEK Conference
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    • pp.1027-1030
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    • 2003
  • In this paper, we designed GF(2$^{m}$ ) inversion and division processor for Elliptic Curve Cryptographic system. The processor that has 191 by m value designed using Modified Euclid Algorithm. The processor is designed using 0.35 ${\mu}{\textrm}{m}$ CMOS technology and consists of about 14,000 gates and consumes 370 mW. From timing simulation results, it is verified that the processor can operate under 367 Mhz clock frequency due to 2.72 ns critical path delay. Therefore, the designed processor can be applied to Elliptic Curve Cryptographic system.

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Rekeying Approach against Side Channel Attacks

  • Phuc, Tran Song Dat;Seok, Byoungjin;Lee, Changhoon
    • Proceedings of the Korea Information Processing Society Conference
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    • pp.373-375
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    • 2017
  • Side-channel attacks and in particular differential power analysis (DPA) attacks pose a serious threat to cryptographic implementations. One approach to counteract such attacks is cryptographic schemes based on fresh re-keying. In settings of pre-shared secret keys, such schemes render DPA attacks infeasible by deriving session keys and by ensuring that the attacker cannot collect side-channel leakage on the session key during cryptographic operations with different inputs. This paper present a study on rekeying approach against side channel attacks with current secure schemes and their rekeying functions.