• Title, Summary, Keyword: fast circuit simulation

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Fast Circuit Simulation Based on Parallel-Distributed LIM using Cloud Computing System

  • Inoue, Yuta;Sekine, Tadatoshi;Hasegawa, Takahiro;Asai, Hideki
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.1
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    • pp.49-54
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    • 2010
  • This paper describes a fast circuit simulation technique using the latency insertion method (LIM) with a parallel and distributed leapfrog algorithm. The numerical simulation results on the PC cluster system that uses the cloud computing system are shown. As a result, it is confirmed that our method is very useful and practical.

Simulation Results of the 4 stage Single Flux Quantum Voltage Multiplier (4 stage 단자속 양자 Voltage Multiplier의 Simulation 결과)

  • Chu, Hyung-Gon;Jung, Ku-Rak;Kang, Joon-Hee
    • 한국초전도학회:학술대회논문집
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    • v.9
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    • pp.238-241
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    • 1999
  • Analog-to-digital converter has attracted a lot of interests as one of the most prospective area of an application of Josephson Junction technology. Recently, the development of a digital-to-analog converter has been pursued to achieved the high performance. One of the main advantage in using single flux quantum logic in a digital-to-analog converter is the low voltage drop in a single Josephson Junction and hence the resolution of the output voltage of this digital-to-analog converter can be very high. In this work, we have used a software, called WRspice, to study a voltage multiplier circuit which is the basic block in building a digital-to-analog circuit. In simulation, we operated a voltage multiplier with .4 Josephson Junctions per stage and studied the dependence on the circuit bias currents and the circuit inductors of the voltage multiplier. Our simulation results showed a fast operation and reasonable circuit margins.

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Acceleration Techniques for Cycle-Based Login Simulation (사이클 기반 논리시뮬레이션 가속화 기법 연구)

  • Park, Young-Ho;Park, Eun-Sei
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.50 no.1
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    • pp.45-50
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    • 2001
  • With increasing complexity of digital logic circuits, fast and accurate verification of functional behaviour becomes most critical bottleneck in meeting time-to-market requirement. This paper presents several techniques for accelerating a cycle-based logic simulation. The acceleration techniques include parallel pattern logic evaluation, circuit size reduction, and the partition of feedback loops in sequential circuits. Among all, the circuit size reduction plays a critical role in maximizing logic simulation speedup by reducing 50% of entire circuit nodes on the average. These techniques are incorporated into a levelized table-driven logic simulation system rather than a compiled-code simulation algorithm. Finally, experimental results are given to demonstrate the effectiveness of the proposed acceleration techniques. Experimental results show more than 27 times performance improvement over single pattern levelized logic simulation.

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High Power Circuit Analysis with the Simulation Technique using Physical Models of Power Devices (물리적인 전력소자 모텔을 이용한 대용량 인버터 시뮬레이션 기술)

  • Yoon Jae Hak;Schroder D.
    • Proceedings of the KIPE Conference
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    • pp.330-333
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    • 2002
  • The design of high power electronic circuits and the verification of the design by practical experiments are time and cost consuming. Recently power circuit simulation technique is developing to do it easily. However, most of the simulation has used the ideal switch model consists of passive component that can not describe the physical characteristics of semiconductor devices and cannot describe the switching transient state. For the design of such power electronic circuits by the simulation, the switching transients are very important. Therefore the simulation models must describe the switching transient and the stationary behavior as precisely as possible on the hand and as fast as possible the other hand. This paper introduces the application of the physical models of power devices that are developed by TUM(Technical University of Munich, Germany) for the power electronic circuit analysis.

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Simulation of Microwave Integrated Circuit on Multilayered Resistive Substrats using Wave Concept Iterative Procedure

  • Akatimagool, Somsak
    • Proceedings of the IEEK Conference
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    • pp.515-518
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    • 2002
  • This paper presents the iterative procedure with the concept of expanded waves in the spectral and spatial domains using the fast modal algorithm. We presents its applications to microwave integrated circuits on resistive substrate. The advantage is a reduction in computation time. These calculated results are checked by comparison with the experimental and simulated results by Sonnet and Momentum program.

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Timing Analysis Techniques Review for sub-30 nm Circuit Designs

  • Kim, Ju-Ho;Han, Sang-Woo;Jewell, Roy
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.4
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    • pp.292-299
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    • 2010
  • With scaled technology, timing analysis of circuits becomes more and more difficult. In this paper, we review recently developed circuit simulation techniques created to deal with the cost issues of transistor-level simulations. Various techniques for fast SPICE simulations and Monte Carlo simulations are introduced. Moreover, process and aging variation issues are mentioned, along with promising methodologies.

A Novel Cell Balancing Circuit for Fast Charge Equalization (빠른 전하 균일화를 위한 새로운 구조의 셀 밸런싱 회로)

  • Park, Dong-Jin;Choi, See-Young;Kim, Yong-Wook;Kim, Rae-Young
    • The Transactions of the Korean Institute of Power Electronics
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    • v.20 no.2
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    • pp.160-166
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    • 2015
  • This study proposes an improved cell balancing circuit for fast equalization among lithium-ion (Li-ion) batteries. A simple voltage sensorless charge balancing circuit has been proposed in the past. This cell balancing circuit automatically transfers energy from high-to low-voltage battery cells. However, the circuit requires a switch with low on-resistance because the balancing speed is limited by the on-resistance of the switch. Balancing speed decreases as the voltage difference among the battery cells decrease. In this study, the balancing speed of the cell balancing circuit is enhanced by using the auxiliary circuit, which boosts the balancing current. The charging current is determined by the nominal battery cell voltage and thus, the balancing speed is almost constant despite the very small voltage differences among the batteries. Simulation results are provided to verify the validity of the proposed cell balancing circuit.

Logic circuit design for high-speed computing of dynamic response in real-time hybrid simulation using FPGA-based system

  • Igarashi, Akira
    • Smart Structures and Systems
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    • v.14 no.6
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    • pp.1131-1150
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    • 2014
  • One of the issues in extending the range of applicable problems of real-time hybrid simulation is the computation speed of the simulator when large-scale computational models with a large number of DOF are used. In this study, functionality of real-time dynamic simulation of MDOF systems is achieved by creating a logic circuit that performs the step-by-step numerical time integration of the equations of motion of the system. The designed logic circuit can be implemented to an FPGA-based system; FPGA (Field Programmable Gate Array) allows large-scale parallel computing by implementing a number of arithmetic operators within the device. The operator splitting method is used as the numerical time integration scheme. The logic circuit consists of blocks of circuits that perform numerical arithmetic operations that appear in the integration scheme, including addition and multiplication of floating-point numbers, registers to store the intermediate data, and data busses connecting these elements to transmit various information including the floating-point numerical data among them. Case study on several types of linear and nonlinear MDOF system models shows that use of resource sharing in logic synthesis is crucial for effective application of FPGA to real-time dynamic simulation of structural response with time step interval of 1 ms.

Development of Nonlinear Inverter Model for Fast Dynamic Analysis of Electric Power Steering with PMSM Drive System (자동차 전자식 조향장치용 PMSM 구동 시스템의 신속한 동적해석을 위한 비선형 인버터 모델 개발)

  • Choi, Chin-Chul;Lee, Woo-Tiak;Hong, Jeong-Pyo
    • Proceedings of the KIEE Conference
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    • pp.1132-1133
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    • 2007
  • A circuit-domain model of PWM inverter provides accurate simulation results in consideration of detail switching characteristics. Although, a huge amount of computation time is demanded for the simulation results of several ten seconds, which is the required time to analyze system behaviors or control performances of Electric Power Steering(EPS) on real drive condition. This paper describes the nonlinear inverter model for fast dynamic simulation of EPS without the PWM concept through analyzing the effect of nonlinear switching characteristics like dead time, forward voltage drop and conduction resistance. Some inverter models including proposed model are compared from two standpoints which are computation time and accuracy. The comparison results show the usefulness of the developed model in order to develop the control algorithm through the fast prediction of system behaviors.

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Switching Characteristics and PSPICE Modeling for MOS Controlled Thyristor (MOS 제어 다이리스터의 특성 해석 및 시뮬레이션을 위한 모델)

  • Lee, Young-Kook;Hyun, Dong-Seok
    • Proceedings of the KIEE Conference
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    • pp.237-239
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    • 1994
  • The MOS-controlled thyristor(MCT) is a new power semi-conductor device that combines four layers thyristor structure presenting regenerative action and MOS-gate providing controlled turn-on and turn-off. The MCT has very fast switching speed owing to voltage controlled MOS-gate, and very low on-state voltage drop resulting from regenerative action of four layers thyristor structure. In addition, because of a higher dv/dt rating and di/dt rating, gate drive circuit and snubber circuit can be simpler comparing to other power switching devices. So recently much interest and endeavor is being applied to develop the performance and ratings of the MCT. This paper describes the switching characteristic of the MCT for its practical applications and presents a model for PSPICE circuit simulation. The model for PSPICE circuit simulation is compared to the experimental result using MCTV75P60F1 made by Harris co..

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