• Title, Summary, Keyword: polycide gate

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Breakdown characteristics of gate oxide with tungsten polycide electrode (텅스텐 폴리사이드 전극에 따른 게이트 산화막의 내압 특성)

  • 정회환;이종현;정관수
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.12
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    • pp.77-82
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    • 1996
  • The breakdown characteristics of metal-oxide-semiconductor(MOS) capacitors fabricated by Al, polysilicon, and tungsten polycide gate electrodes onto gate oxide was evaluated by time zero dielectric breakdwon (TZDB). The average breakdown field of the gate oxide with tungsten polycide electride was lower than that of the polysilicon electrode. The B model (1~8MV/cm) failure of the gate oxide with tungsten polycide electrode was increased with increasing annealing temperature in the dry $O_{2}$ ambient. This is attributed ot fluorine and tungsten diffusion from thungsten silicide film into the gate oxide, and stress increase of tungsten polcide after annealing treatment.

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The Evaluation for Reliability Characteristics of MOS Devices with Different Gate Materials by Plasma Etching Process (게이트 물질을 달리한 MOS소자의 플라즈마 피해에 대한 신뢰도 특성 분석)

  • 윤재석
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.4 no.2
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    • pp.297-305
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    • 2000
  • It is observed that the initial properties and degradation characteristics on plasma of n/p-MOSFET with polycide and poly-Si as different gate materials under F-N stress and hot electron stress are affected by metal AR(Antenna Ratio) during plasma process. Compared to that of MOS devices with poly-Si gate material, reliability properties on plasma of MOS devices with polycide gate material are improved. This can be explained by that fluorine of tungsten polycide process diffuses through poly-Si into gate oxide and results in additional oxide thickness. The fact that MOS devices with polycide gate material can reduce damages of plasma process shows possibility that polycide gate material can be used as gate material for next generation MOS devices.

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C-V Characteristics of Cobalt Polycide Gate formed by the SADS(Silicide As Diffusion Source) Method (SADS(Siliide As Diffusion Source)법으로 형성한 코발트 폴리사이트 게이트의 C-V특성)

  • 정연실;배규식
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.13 no.7
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    • pp.557-562
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    • 2000
  • 160nm thick amorphous Si and polycrystalline Si were each deposited on to 10nm thick SiO$_2$, Co monolayer and Co/Ti bilayer were sequentially evaporated to form Co-polycide. Then MOS capacitors were fabricated by BF$_2$ ion-implantation. The characteristics of the fabricated capacitor samples depending upon the drive-in annel conductions were measured to study the effects of thermal stability of CoSi$_2$and dopant redistribution on electrical properties of Co-polycide gates. Results for capacitors using Co/Ti bilayer and drive-in annealed at 80$0^{\circ}C$ for 20~40sec. showed excellent C-V characteristics of gate electrode.

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Effects of $WSi_x$, thickness and F concentration on gate oxide characteristics in tungsten polycide gate structure (Tungsten polycide gate 구조에서 $WSi_x$ 두께와 fluorine 농도가 gate oxide 특성에 미치는 영향)

  • 김종철
    • Journal of the Korean Vacuum Society
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    • v.5 no.4
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    • pp.327-332
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    • 1996
  • In this study, the effects of $WSi_x$, thickness and fluorine concentration in tungsten polycide gate structure on gate oxide were investigated. As $WSi_x$, thickness increases, gate oxide thickness increases with fluorine incorporation in gate oxide, and time-to-breakdown($T_{BD,50%}$) of oxide decreases. The stress change with $WSi_x$ thickness was also examined. But it is understood that the dominant factor to degrade gate oxide properties is not the stress but the fluorine, incorporated during $WSi_x$ deposition, diffused into $WSiO_2$ after heat treatment. In order to understand the effect of fluorine diffusion into oxidem fluorine ion implanted gates were compared. The thickness variation and $T_{BD,50%}$ of gate oxide is saturated over 600 $\AA$ thickness of $WSi_x$. The TEM and SIMS studies show the microstructure less than 600 $\AA$ thickness is dense and flat in surface. However, over 600$\AA$, the microstructure of $WSi_x$ is divided into two parts: upper porous phase with rugged surface and lower dense phase with smmoth interface. And this upper phase is transformed into oxygen rich crystalline phase after annealing, and the fluorine is captured in this layer. Therefore, the fluorine diffusion into the gate oxide is saturated.

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A study on the dielectric characteristics improvement of gate oxide using tungsten policide (텅스텐 폴리사이드를 이용한 게이트 산화막의 절연특성 개선에 관한연구)

  • 엄금용;오환술
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.34D no.6
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    • pp.43-49
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    • 1997
  • Tungsten poycide has studied gate oxide reliability and dielectric strength charactristics as the composition of gate electrode which applied submicron on CMOS and MOS device for optimizing gate electrode resistivity. The gate oxide reliability has been tested using the TDDB(time dependent dielectric breakdwon) and SCTDDB (stepped current TDDB) and corelation between polysilicon and WSi$_{2}$ layer. iN the case of high intrinsic reliability and good breakdown chracteristics on polysilicon, confirmed that tungsten polycide layer is a better reliabilify properities than polysilicon layer. Also, hole trap is detected on the polysilicon structure meanwhile electron trap is detected on polycide structure. In the case of electron trap, the WSi$_{2}$ layer is larger interface trap genration than polysilicon on large POCL$_{3}$ doping time and high POCL$_{3}$ doping temperature condition. WSi$_{2}$ layer's leakage current is less than 1 order and dielectric strength is a larger than 2MV/cm.

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Dielectric Brekdown Chatacteristecs of the Gate Oxide for Ti-Polycide Gate (Ti-Ploycide 게이트에서 게이트산화막의 전연파괴특성)

  • Go, Jong-U;Go, Jong-U;Go, Jong-U;Go, Jong-U;Park, Jin-Seong;Go, Jong-U
    • Korean Journal of Materials Research
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    • v.3 no.6
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    • pp.638-644
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    • 1993
  • The degradation of dielectric breakdown field of 8nm-thick gate oxide ($SiO_2$) for Tipolycide MOS(meta1-oxide-semiconductor) capacitor with different annealing conditions and thickness of the polysilicon film on gate oxide was investigated. The degree of degradation in dielectric breakdown strength of the gate oxide for Ti-polycide gate became more severe with increasing annealing temperature and time, especially, for the case that thickness of the polysilicon film remained on the gate oxide after silicidation was reduced. The gate oxide degradation may be occurred by annealing although there is no direct contact of Ti-silicide with gate oxide. From SIMS analysis, it was confirmed that the degration of gate oxide during annealing was due to the diffusion of titanium atoms into the gate oxide film through polysilicon from the titanium silicide film.

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A Study of Titanium and Cobalt Silicide (Titanium과 Cobalt silicide의 연구)

  • Kim, Sang-Yong;Yu, Seok-Bin;Seo, Yong-Jin;Kim, Tae-Hyung;Kim, Chang-Il;Chang, Eui-Goo
    • Proceedings of the KIEE Conference
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    • pp.122-126
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    • 1989
  • A composite polycide struoture consisting of refractory metal and noble metal silicide film on top of polysilicon bas been considered as a replacement for polysilicon as a gate electrode and Interconnect line in MOSFET integrated circuits. In this paper presents divice characteristics of NOS with $TiSi_2/n^+$polyoide and $CoSi_2/n^+$polycide gate. Also, evaporated Ti,Co films on polysilicon has been annealed by RTA and furnace annealing in $N_2$ abient at temperature of $400^{\circ}C-1000^{\circ}C$. The Ti-,Co-silioide formation is characterized by 4-point probe, silicide growth rate and Its reproductivity bas been examined by SEM.

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Electrical Properties of Nickel Polycide Gate (니켈 폴리사이드 게이트의 전기적 특성)

  • 정연실;김시중;김주연;배규식
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • pp.449-452
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    • 1999
  • NiSi were formed from either Ni monolayer or Ni/Ti bilayer and the SADS method was applied to fabricated PMOSFET with Ni-polycide gate electrodes. PMOSFET made from Ni monolayer showed thermal stability unto 300~40$0^{\circ}C$ for 600sec., and excellent C-V characteristics for long time of drive-in anneal than PMOSFET made from Ni/Ti bilayer. This was attributed to easier decomposition and subsequent Ni diffusion to SiO$_2$ layer, probably due to the presence of Ti unreducing process

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