유전자알고리즘을 이용한 FPGA에서의 디지털 회로의 합성

Digital Circuit Synthesis on FPGA by using Genetic Algorithm

  • 박태서 (인하대학교 공과대학 전기공학과) ;
  • 위재우 (인하대학교 공과대학 전기공학과) ;
  • 이종호 (인하대학교 공과대학 전기공학과)
  • Park, Tae-Suh (Department of Electrical Engineering, Inha University) ;
  • Wee, Jae-Woo (Department of Electrical Engineering, Inha University) ;
  • Lee, Chong-Ho (Department of Electrical Engineering, Inha University)
  • 발행 : 1999.07.19

초록

In this paper, digital circuit evolution is proposed as an intrinsic evolvable system. Evolutionary hardware is a reconfigurable one which adapt itself to the environment and evolve its structure to realize desired performance. By using special FPGA and genetic algorithm, we have made a prototype of intrinsic hardware evolution system. As an example for digital circuit evolution, full adder realization is performed. As the result of this, a very complex structure of digital circuit performing full adder was created. Analysis made on the hardware revealed that some undetermined circuits were developed.

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