Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)

The Korean Institute of Electrical Engineers (대한전기학회)
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A Study of Micro-defect on chemical Mechanical Polishing(CMP) Process in VLST Circuit

고집적화 반도체 소자의 CMP 공정에서 Micro-Defect 관한 연굴

  • Kim, Sang-Yong (Dept. of Electrical Engineering, Chung-Ang University) ;
  • Lee, Kyeng-Tae (Dept. of Electrical Engineering, Chung-Ang University) ;
  • Seo, Yong-Jin (School of Electrical and Electronic Engineering, Daebul University) ;
  • Lee, Woo-Sun (School of Electrical and Electronic Engineering, Cho-Sun University) ;
  • Chung, Hun-Sang (School of Electrical and Electronic Engineering, Cho-Sun University) ;
  • Kim, Chang-Il (Dept. of Electrical Engineering, Chung-Ang University) ;
  • Chang, Eui-Goo (Dept. of Electrical Engineering, Chung-Ang University)
  • 김상용 (중앙대학교 전기공학과) ;
  • 이경태 (중앙대학교 전기공학과) ;
  • 서용진 (대불대학교 전기전자공학부) ;
  • 이우선 (조선대학교 전기공학과) ;
  • 정헌상 (조선대학교 전기공학과) ;
  • 김창일 (중앙대학교 전기공학과) ;
  • 장의구 (중앙대학교 전기공학과)
  • Published : 1999.07.19
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Abstract

We can classify the scratches after CMP process into micro-scratch and macro-scratches according to the scratch size, scratch intensity and defect map, etc. The micro-scratches on wafer after CMP process are discussed in this paper. From many causes, major factor that influences the formation of micro-scratch is known as particle size distribution of slurry.(1) It is indefinite what size or type of particle can cause micro-scratch on wafer surface, but there is possibility caused by large particle over 1um. The best way for controlling these large particle to inflow is to use the slurry filter on POU(Point of user). But the slurry filter(especially, depth-type filter) has sometimes the problem which makes more sever micro-scratches on wafer surface after CMP. We studied that depth-type slurry filter has what kind of week-points and the number of scratch could be reduced by lowering slurry flow rate and by using high spray bar which sprays DIW on polishing pad with high pressure.

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