Electrical Characteristics of Poly-Si TFT`s with Improved Degradation

열화가 억제된 다결정 실리콘 박막 트랜지스터의 전기적 특성

  • 변문기 (수원대학교 전자재료공학과) ;
  • 이제혁 (수원대학교 전자재료공학과) ;
  • 백희원 (수원대학교 전자재료공학과) ;
  • 김동진 (유한대학교 전자공학과) ;
  • 김영호 (수원대학교 전자재료공학과)
  • Published : 1999.11.01

Abstract

The effects of electrical positive stress on n-channel LDD and offset structured poly-Si TFT\`s have been systematically investigated in order to analyze the transfer curve\`s shift mechanism. It has been found that the LDD and offset regions behave as a series resistance that reduce the electric field near drain. Hot carrier effects are reduced because of these results. After electrical stress transfer curve’s shift and variation of the off-current are dependent upon the offset length rather than offset region’s doping concentration. Variation of the subthreshold slope is dependent upon offset region’s doping concentration as well as offset length.

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