단일 트랜지스터용 강유전체 메모리의 Buffer layer용 $Y_{2}O_3$의 연구

$Y_{2}O_3$ Films as a Buffer layer for a Single Transistor Type FRAM

  • 장범식 (성균관대학교 전기전자 및 컴퓨터공학부) ;
  • 임동건 (성균관대학교 전기전자 및 컴퓨터공학부) ;
  • 최석원 (성균관대학교 전기전자 및 컴퓨터공학부) ;
  • 문상일 (성균관대학교 전기전자 및 컴퓨터공학부) ;
  • 이준신 (성균관대학교 전기전자 및 컴퓨터공학부)
  • Jang, Bum-Sik (School of Electrical and Computer Engineering, Sungkyunkwan University) ;
  • Lim, Dong-Gun (School of Electrical and Computer Engineering, Sungkyunkwan University) ;
  • Choi, Suk-Won (School of Electrical and Computer Engineering, Sungkyunkwan University) ;
  • Mun, Sang-Il (School of Electrical and Computer Engineering, Sungkyunkwan University) ;
  • Yi, Jun-Shin (School of Electrical and Computer Engineering, Sungkyunkwan University)
  • 발행 : 2000.07.17

초록

This paper investigated structural and electrical properties of $Y_{2}O_3$ as a buffer layer of sin91r transistor FRAM (ferroelectric RAM). $Y_{2}O_3$ buffer layers were deposited at a low substrate temperature below 400$^{\circ}C$ and then RTA (rapid thermal anneal) treated. Investigated parameters are substrate temperature, $O_2$ partial pressure, post- annealing temperature, and suppression of interfacial $SiO_2$ layer generation. for a well-fabricated sample, we achieved that leakage current density ($J_{leak}$) in the order of $10^{-7}A/cm2$, breakdown electric field ($E_{br}$) about 2 MV/cm for $Y_{2}O_3$ film. Capacitance versus voltage analysis illustrated dielectric constants of 7.47. We successfully achieved an interface state density of $Y_{2}O_3$/Si as low as $8.72{\times}10^{10}cm^{-2}eV^{-1}$. The low interface states were obtained from very low lattice mismatch less than 1.75%.

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