단전자 트랜지스터로 구성된 논리 게이트 특성에 관한 연구

A Study of Single Electron Transistor Logic Characterization Using a SPICE Macro-Modeling

Single Electron Transistor Logic (SETL) can be characterized by HSPICE simulation using a SPICE macro model. First, One unit SET is characterized by Monte-carlo simulation and then we fit SPICE macro-modeling equations to its characteristics. Second, using this unit SET, we simulate the transient characteristics of two-input NAND gate in both the static and dynamic logic schemes. The dynamic logic scheme shows more stable operation in terms of logic-swing and on/off current ratio. Also, there is a merit that we can use the SET only as current on-off switch without considering the voltage gain.