Design St Implementation of a High-Speed Navigation Computer for Strapdown INS

스트랩다운 관성항법시스템 고속 항법컴퓨터 설계와 구현

This paper describes the design and implementation of a high-speed navigation computer to achieve precision navigation performance with Strapdown INS. The navigation computer inputs are velocity and angular increment data from the ISA at the signal of the 2404Hz interrupt and performs the removal of gyro block motion and the compensation of high dynamic errors at the 200Hz. For high-speed and high-accuracy, the computer consists of the 68040 micro-processor, 128k Memories, FPGAs, and so on. We show that the computer satisfies the required performance by In-Run navigation tests.