Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference (한국전기전자재료학회:학술대회논문집)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
권호 표지

A study on EPD of STI CMP Process with Reverse Moat Pattern

Reverse Moat Pattern을 가진 STI CMP 공정에서 EPD 고찰

  • 이경태 (중앙대학교 전자전기공학부) ;
  • 김상용 (중앙대학교 전자전기공학부) ;
  • 서용진 (대불대학교 전기전자 공학부) ;
  • 김창일 (중앙대학교 전자전기공학부) ;
  • 장의구 (중앙대학교 전자전기공학부)
  • Published : 2000.04.28
Download PDF
⟨ Previous Next ⟩

Abstract

The rise throughput and the stability in fabrication of device can be obtained by applying of CMP process to STI structure in 0.18um semiconductor device. To employ in STI CMP, the reverse moat process has been added thus the process became complex and the defects were seriously increased. Removal rates of each thin films in STi CMP was not equal hence the devices must to be effected, that is, the damage was occured in the device dimension in the case of excessive CMP process and the nitride film was remained on the device dimension in the case of insufficient CMP process than these defects affect the device characteristics. We studied the current sensing method in STI-CMP with the reverse moat pattern.

Keywords