Simulation of Efficient FlowControl for Photolithography Process Manufacturing of Semiconductor

  • Han, Young-Shin (School of Electrical and Computer Engineering Sungkyunkwan University) ;
  • Lee, Chilgee (School of Electrical and Computer Engineering Sungkyunkwan University)
  • 발행 : 2001.10.01

초록

Semiconductor wafer fabrication is a business of high capital investment and fast changing nature. To be competitive, the production in a fab needs to be effectively planned and scheduled starting from the ramping up phase, so that the business goals such as on-time delivery, high output volume and effective use of capital intensive equipment can be achieved. In this paper, we propose Stand Alone layout and In-Line layout are analyzed and compared while varying number of device variable changes. The comparison is performed through simulation using ProSys; a window 98 based discrete system simulation software, as a tool for comparing performance of two proposed layouts. The comparison demonstrates that when the number of device variable change is small, In-Line layout is more efficient in terms of production quantity. However, as the number of device variable change is more than 14 titles, Stand Alone layout prevails over In-Line layout.

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