Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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The Efficient Memory Mapping of FPGA Implemenation for Real-Time 2-D Discrete Wavelet Transform using Mallat tree algorithm

Mallat tree 방법을 이용한 실시간 2-D DWT의 FPGA 구현을 위한 효율적인 메모리 사상

  • 김왕현 (광운대학교 반도체 및 신소재 공학과) ;
  • 서영호 (광운대학교 반도체 및 신소재 공학과) ;
  • 김종현 (광운대학교 반도체 및 신소재 공학과) ;
  • 김동욱 (광운대학교 반도체 및 신소재 공학과)
  • Published : 2001.06.01
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Abstract

This paper proposed an efficient memory scheduling method (E$^2$M$^2$) by which the real-time image compression using 2-dimensional discrete wavelet transform(2-D DWT) is possible in an FPGA chip. In this paper, we assumed that the 2-D DWT was performed as the Mallat-tree. After the memory mapping method was proved in software, the memory controller was designed for an commercial SDRAM IC.

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