대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)
- 대한전자공학회 2002년도 ITC-CSCC -2
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- Pages.940-943
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- 2002
Implementation of AES and Triple-DES cryptography using a PCI-based FPGA board
- Kwon, Oh-Jun (Department of Computer Science, National Defense Academy) ;
- Seike, Hidenori (Department of Computer Science, National Defense Academy) ;
- Kajisaki, Hirotsugu (Department of Computer Science, National Defense Academy) ;
- Kurokawa, Takakazu (Department of Computer Science, National Defense Academy)
- 발행 : 2002.07.01
초록
This paper presents hardware implementations of the two representative cryptographic algorithms, Advanced Encryption Standard (Rijndael), and the present American federal standard (Triple DES) using a PCI- based FPGA board named "EBSW-1" This board bases on a FPGA chip (Xilinx Virtex300 XCV300PQ240-4). The implementation results of these two algorithms were tested successfully. AES circuit could proceed an encryption as well as a decryption two times faster than the Triple-DES circuit, while the former circuit used higher rates of CLBs. Besides, if these architectures use pipeline-registers, the processing speed will be increased about 1.5 times than the presented circuits.
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