Embedded System for Video Coding with Logic-Enhanced DRAM and Configurable Processor

  • Kaya, Toshiyuki (Dept. Information Systems Eng. Osaka University) ;
  • Miyamoto, Ryusuke (Dept. Communications & Computer Eng. Kyoto University) ;
  • Onoye, Takao (Dept. Information Systems Eng. Osaka University, Dept. Communications & Computer Eng. Kyoto University) ;
  • Shirakawa, Isao (Dept. Information Systems Eng. Osaka University)
  • Published : 2002.07.01

Abstract

A novel approach of embedded systems for video coding is introduced with the main theme focused on logic-enhanced DRAM and configurable processor. This approach is aiming at reducing high computational costs and frequent memory accessing, which embedded systems are suffering with in the execution of video coding. According Co the software execution analysis, large size functions with intensive memory accesses are tuned to be executed by the logic-enhanced DRAM while small size functions repeatedly called are to be executed by dedicated instructions, which are newly introduced in the configurable processor. The proposed system can speed up H.263 video coding algorithm 7.4 times in comparison with the conventional embedded processor based system.

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