Test Scheduling for System-on-Chips using Test Resources Grouping

테스트 자원 그룹화를 이용한 시스템 온 칩의 테스트 스케줄링

  • Park, Jin-Sung (Dept. of Electronic Engineering, Kwandong University) ;
  • Lee, Jae-Min (Dept. of Electronic Engineering, Kwandong University)
  • 박진성 (관동대학교 전자공학과) ;
  • 이재민 (관동대학교 전자공학과)
  • Published : 2002.11.30

Abstract

Test scheduling of SoC becomes more important because it is one of the prime methods to minimize the testing time under limited power consumption of SoCs. In this paper, a heuristic algorithm, in which test resources are selected for groups and arranged based on the size of product of power dissipation and test time together with total power consumption in core-based SoCs is proposed. We select test resource groups which has maximum power consumption but does not exceed the constrained power consumption and make the testing time slot of resources in the test resource group to be aligned at the initial position to minimize the idle test time of test resources.

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