Design of Parallel Multiplier Circuit synthesized operation module over $GF(2^m)$

연산 모듈의 결합에 의한 $GF(2^m)$상의 병렬 승산 회로의 설계

In this paper, a new parallel multiplier circuit over $GF(2^m)$ has been proposed. The new multiplier is composed of polynomial multiplicative operation part and modular arithmetic operation part, irreducible polynomial operation part. And each operation has modular circuit block. For design the new proposed circuit, it develop generalized equations using frame each operation idea and show a example for $GF(2^m)$.