Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Comparator design using high speed Bipolar device

고속 Bipolar 소자를 이용한 comparator 설계

  • Park Jin-Woo (Dept. of Electric engineering, Sogang University) ;
  • Cho Jung-Ho (Dept. of Electric engineering, Sogang University) ;
  • Gu Young Sea (Dept. of Electric engineering, Sogang University) ;
  • An Chel (Dept. of Electric engineering, Sogang University)
  • 박진우 (서강 대학교 전자공학과) ;
  • 조정호 (서강 대학교 전자공학과) ;
  • 구용서 (서경 대학교 전자공학과) ;
  • 안철 (서강 대학교 전자공학과)
  • Published : 2004.06.01
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Abstract

This thesis presents Bipolar transistor with SAVEN(Self-Aligned VErtical Nitride) structure as a high-speed device which is essential for high-speed system such as optical storage system or mobile communication system, and proposes 0.8${\mu}m$ BiCMOS Process which integrates LDD nMOS, LDD pMOS and SAVEN bipolar transistor into one-chip. The SPICE parameters of LDD nMOS, LDD pMOS and SAVEN Bipolar transistor are extracted, and comparator operating at 500MHz sampling frequency is designed with them. The small Parasitic capacitances of SAVEN bipolar transistor have a direct effect on decreasing recovery time and regeneration time, which is helpful to improve the speed of the comparator. Therefore the SAVEN bipolar transistor with high cutoff frequency is expected to be used in high-speed system.

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