Analysis of Cell Latch-up Effect in SRAM Device

SRAM 소자의 Cell Latch-up 현상 분석

  • Lee Jun-Ha (Dept of Computer System Engineering, Information Display Research Center, Sangmyung University) ;
  • Lee Hoong-Joo (Dept of Computer System Engineering, Information Display Research Center, Sangmyung University)
  • 이준하 (상명대학교 정보디스플레이 연구소 컴퓨터시스템공학전공) ;
  • 이흥주 (상명대학교 정보디스플레이 연구소 컴퓨터시스템공학전공)
  • Published : 2004.11.01

Abstract

A soft error rate neutrons is a growing problem for terrestrial integrated circuits with technology scaling. In the acceleration test with high-density neutron beam, a latch-up prohibits accurate estimations of the soft error rate (SER). This paper presents results of analysis for the latch-up characteristics in the circumstance corresponding to the acceleration SER test for SRAM. Simulation results, using a two-dimensional device simulator, show that the deep p-well structure has better latch-up immunity compared to normal twin and triple well structures. In addition, it is more effective to minimize the distance to ground power compared with controlling a path to the $V_{DD}$ power.

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