Analysis of Row and Column Lines in TFT-LCD panels with a Distributed Electrical Model

  • Park, Hyun-Woo (Dept. of Electronics and Computer Engineering, Korea University) ;
  • Kim, Soo-Hwan (Dept. of Electronics and Computer Engineering, Korea University) ;
  • Kim, Gyoung-Bum (Dept. of Electronics and Computer Engineering, Korea University) ;
  • Hwang, Sung-Woo (Dept. of Electronics and Computer Engineering, Korea University) ;
  • Kim, Su-Ki (Dept. of Electronics and Computer Engineering, Korea University) ;
  • McCartney, Richard I. (Displays Division, National Semiconductor)
  • Published : 2005.07.19

Abstract

As the TFT-LCD panels become larger and provide higher resolution, the distributed capacitive and resistive lines induce the propagation delay, reduce the TFT-on time and deteriorate the pixel chargingratio. A number of the compensation methods, like the H-LDC (Horizontal Line Delay Compensation), have been proposed to compensate the propagation delay of the large and high resolution panels [1]. These methods, however, require the comparatively accurate gate propagation delay estimates at each column driver. In this paper, by observing the actual gate and data waveform from 15-inch XGA TFT-LCD panels, we could predict the propagation delay along the row and column line.

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