한국정보디스플레이학회:학술대회논문집

The Korean Infomation Display Society (한국정보디스플레이학회)
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Electrical performance and contact resistance with the substrate temperature in the pentacene organic thin-film transistors

  • Lee, Cheon-An (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University) ;
  • Jang, Kyoung-Chul (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University) ;
  • Kim, Sung-Won (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University) ;
  • Ryoo, Ki-Hyun (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University) ;
  • Jin, Sung-Hun (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University) ;
  • Lee, Jong-Duk (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University) ;
  • Shin, Hyung-Cheol (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University) ;
  • Park, Byung-Gook (Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering, Seoul National University)
  • Published : 2005.07.19
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Abstract

Bottom contact pentacene organic thin-film transistors are fabricated at three different substrate temperatures, $70^{\circ}C$, $80^{\circ}C$ and $90^{\circ}C$. The maximum effective mobility was obtained at $80^{\circ}C$. The contact resistance was extracted by applying two different methods, TLM method and channel-resistance method, and the value shows the minimum at $80^{\circ}C$, which is thought to be the important reason for the best performance.

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