An Implementation of Network Processor Protocol Converter and flow Control using FPGA

FPGA를 이용한 Network Processor용 Protocol 변환장치의 구현 및 흐름제어

Recent trend on high speed packet processing for providing multiple internet services is to use network processor instead of being implemented by legacy ASIC or FPGA. Most frequently used network processor interface is the SPI4.2. This paper address the data-rate conversion interface device between SPI4.2 and SPI3/CSIX, implemented using XILINX XC2VP40 FPGA. Furthermore, we address the methodology and necessity of flow control occurred due to the data rate difference between 10Gbps and 3.2 Gbps.