Near $100^{\circ}C$ low temperature a-Si TFT array fabrication on 7 inch flexible PES substrates

  • Nikulin, Ivan V. (MDD Team, LCD R&D Center, Samsung Electronics) ;
  • Hwang, Tae-Hyung (MDD Team, LCD R&D Center, Samsung Electronics) ;
  • Jeon, Hyung-Il (MDD Team, LCD R&D Center, Samsung Electronics) ;
  • Kim, Sang-Il (MDD Team, LCD R&D Center, Samsung Electronics) ;
  • Roh, Nam-Seok (MDD Team, LCD R&D Center, Samsung Electronics) ;
  • Shin, Seong-Sik (MDD Team, LCD R&D Center, Samsung Electronics)
  • Published : 2006.08.22

Abstract

High-quality a-Si TFTs were fabricated on 7 inch plastic PES substrates at $130^{\circ}C$ and $100^{\circ}C$. It had been shown that the key factor for successful TFT fabrication on the relatively large plastic substrates is thorough control of total active layer's stress by means of deposition temperature reduction and single layer's intrinsic stress optimization.

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