Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference (한국전기전자재료학회:학술대회논문집)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Fabrication and Characterization of the BLT/STA/Si Structure for Fe-FETs Application

  • Park, Kwang-Huna (School of Electrical and Computer Engineering, University of Seoul) ;
  • Jeon, Ho-Seung (School of Electrical and Computer Engineering, University of Seoul) ;
  • Park, Jun-Seo (School of Electrical and Computer Engineering, University of Seoul) ;
  • Im, Jong-Hyun (School of Electrical and Computer Engineering, University of Seoul) ;
  • Park, Byung-Eun (School of Electrical and Computer Engineering, University of Seoul) ;
  • Kim, Chul-Ju (School of Electrical and Computer Engineering, University of Seoul)
  • Published : 2010.04.01
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Abstract

Ferroelectric thin films have been widely investigated for future nonvolatile memory application. We fabricated the BLT ($(Bi,La)_4Ti_3O_{12}$) films on Si using a STA ($SrTa_2O_6$) buffer layer BLT and STA film were prepared by sol-gel method. Measurement data by XRD and AFM, showed that BLT film and STA films were well crystallized and a good surface morphology. From C-V measurement reward that the Au/BLT/STA/Si structure showed a clockwise hysteresis loop with a memory window of 1.5 V for the bias voltage sweep of ${\pm}5$ V. From results, the Au/BLT/STA/Si structure is useful for FeFETs.

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